Claims
- 1. A package for an integrated circuit, comprising:
- a conductive stiffener;
- a conductive circuit layer attached to said stiffener;
- a plurality of solder ball bond sites within said circuit layer;
- a plurality of solder balls electrically coupled to said plurality of solder ball bond sites;
- at least one via electrically coupled to at least one of said solder ball bond sites, said via being offset from said solder ball bond sites, said via formed to allow electrical coupling of said conductive circuit layer and said conductive stiffener; and
- a conductive plug within said via, said conductive plug electrically coupling said circuit layer and said conductive stiffener, said solder balls and said conductive plug having relative heights such that said solder balls may be attached to a substrate without said conductive plug touching said substrate.
- 2. The package of claim 1, said conductive stiffener forming an electrical plane.
- 3. The package of claim 1, further comprising:
- an adhesive layer between said conductive stiffener and said circuit layer,
- said via being formed in said adhesive layer and said circuit layer.
- 4. The package of claim 3 further comprising:
- said conductive plug extending from at least said stiffener to said circuit layer.
- 5. A TBGA package for electrically connecting an integrated circuit to a substrate, said package comprising:
- a conductive stiffener;
- a flexible circuit attached to said stiffener, said flexible circuit including at least one dielectric layer and at least one conductor layer;
- an adhesive layer for attaching said flexible circuit to said stiffener;
- a plurality of solder ball bond sites located on said flexible circuit;
- a plurality of solder balls electrically coupled to said plurality of solder ball bond sites;
- a via formed in said flexible circuit and said adhesive layer, said via formed at a location other than said solder ball bond sites and providing a path through which electrical coupling of said stiffener and said flexible circuit may be accomplished; and
- a conductive plug within said via, said solder balls and said conductive plug having relative heights such that said solder balls may be attached to said substrate without said conductive plug touching said substrate.
- 6. The TBGA package of claim 5, further comprising a plurality of vias formed in said flexible circuit and said adhesive layer, said plurality of vias being selectably fillable with said conductive plug.
- 7. The TBGA package of claim 6, said conductive layer of said flexible circuit facing said stiffener.
- 8. An electronic package for attachment to a substrate, comprising:
- an integrated circuit; and
- a ball grid array package, said integrated circuit attached to said ball grid array package, said integrated circuit and said ball grid array package electrically coupled to each other, said ball grid array package comprising,
- a conductive stiffener forming an electrical plane,
- a TAB tape attached to said stiffener,
- a plurality of solder balls electrically coupled to said TAB tape, and
- at least one conductive plug electrically coupling said TAB tape to said conductive stiffener, said conductive plug being horizontally offset from said solder balls;
- wherein said solder balls and said at least one conductive plug have relative heights such that said solder balls may be attached to said substrate without said at least one conductive plug touching said substrate.
- 9. The package of claim 8, further comprising:
- a plurality of vias electrically coupled to said solder balls, said vias being selectably fillable such that said solder balls coupled to said vias may optionally be electrically coupled to said conductive stiffener.
- 10. The package of claim 9, said TAB tape including at least one conductor layer and at least one dielectric layer, said conductor layer being an outer layer facing said conductive stiffener.
Parent Case Info
This application is a continuation-in-part of copending application Ser. No. 08/509,779, filed Aug. 1, 1995, Pat. No. 5,663,530, the disclosure of which is expressly incorporated herein by reference.
US Referenced Citations (17)
Foreign Referenced Citations (2)
Number |
Date |
Country |
0 011 013 |
May 1980 |
EPX |
04348097 |
Dec 1992 |
JPX |
Non-Patent Literature Citations (2)
Entry |
Atsushi et al., "Semiconductor Device," Patent Abstract of Japan, Publication No. JP8064635, Mitsui Hihg Tec, Inc., Mar. 8, 1996. |
Mamoru, "Semiconductor Device and Manufacture of Manufacture of Semiconductor Mounting Board," Patent Abstract of Japan, Publication No. JP8008352, Hitachi Cable Ltd., Jan. 12, 1996. |
Continuation in Parts (1)
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Number |
Date |
Country |
Parent |
509779 |
Aug 1995 |
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