This application is based upon and claims the benefit of priority of the prior Japanese Patent Application No. 2012-071795, filed on Mar. 27, 2012, the entire contents of which are incorporated herein by reference.
The embodiments discussed herein are related to a printed circuit board manufacturing method.
It is possible to achieve a thinner board assembly body (board mounted with a semiconductor chip) by making the semiconductor chip for mounting to the board thinner. However, if the semiconductor chip is made thinner then there is a concern regarding warping occurring during bonding to the board due to lower rigidity.
Technology is known in for example multi-layer wiring boards of forming a depleted area where some layer(s) have been removed at positions corresponding to a chip configuration section at the center of a semiconductor component to alleviate differences between deformation behavior of the chip configuration section and deformation behavior of the multi-layer wiring board.
Japanese Laid-Open Patent Publication No. 2000-216291
According to an aspect of the embodiments, a printed circuit board manufacturing method is provided. The printed circuit board manufacturing method includes: supporting a substrate on a support member; disposing a semiconductor chip on an opposite side of the substrate from the support member and pressing the semiconductor chip against the substrate with a pressing member; employing as the support member a member formed with a cavity larger than an external profile of the semiconductor chip to be mounted to the substrate and formed, at at least a portion of a bottom face of the cavity, with a sloping portion towards a center of the cavity, and causing a bump of the semiconductor chip to face towards the sloping portion when the semiconductor chip is pressed towards the substrate; and bonding the semiconductor chip to the substrate with an adhesive interposed between the substrate and the semiconductor chip.
The object and advantages of the invention will be realized and attained by means of the elements and combinations and particularly pointed out in the claims.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention.
Detailed explanation follows regarding exemplary embodiments of a printed circuit board manufacturing method (referred to below simply as “manufacturing method”) disclosed in the present application and a portion of a printed circuit board manufacturing apparatus (referred to below simply as “manufacturing apparatus”) applicable to the manufacturing method, with reference to the drawings.
Note that in
As illustrated in
The package substrate 16 includes a base 18 formed in a flat plate shape from a material with a specific insulating ability and rigidity (such as for example an epoxy resin). A desired circuit pattern may be formed on the base 18 with for example copper foil
The manufacturing apparatus 12 includes a press member 20. The press member 20 in the first exemplary embodiment has a flat pressing face 20P that faces towards the support face 14S. A suction hole 22 is provided piercing through the press member 20 in a direction normal to the pressing face 20P. The semiconductor chip 24 can be suctioned towards the pressing face 20P side by applying a negative pressure from a suction apparatus.
The press member 20 is also configured such that at least the pressing face 20P can be heated by a heating mechanism to the melting temperature of an adhesive 30, described later, or higher. It is possible to press the suctioned semiconductor chip 24 forwards against the package substrate 16 on the mounting stage 14 using a driving mechanism.
The semiconductor chip 24 includes a chip body 26 formed in a substantial plate shape and internally formed with a desired circuit in advance. Plural bumps 28 are formed on the chip body 26.
Each of the bumps 28 projects out towards the facing face of the package substrate 16. The leading ends of the bumps 28 make contact with the package substrate 16, thereby mounting the semiconductor chip 24 in a specific position on the package substrate 16, and rendering the semiconductor chip 24 and the package substrate 16 electrically contiguous. In the illustrated example, plural of the bumps 28 are disposed along the vicinity of the outer edge portion of the chip body 26 as viewed along the normal direction (the arrow A1 direction) to the chip body 26.
In the manufacturing method of the present exemplary embodiment, as illustrated in
An example of the bumps 28 is solder bumps, however other bumps may also be employed, such as stud bumps and gold bumps.
In the example illustrated in the drawings, the adhesive 30 is coated on the package substrate 16 at a position between the bumps 28. Then, as illustrated in
A separating member 32 is interposed between the pressing face 20P of the press member 20 and the semiconductor chip 24. The separating member 32 is made of a material that readily releases from the adhesive 30, and is formed in a film form larger than the outside edge of the semiconductor chip 24. The semiconductor chip 24 is suctioned by the press member 20 though the separating member 32 (with the separating member 32 interposed between the semiconductor chip 24 and the pressing face 20P).
The separating member 32 is employed such that the adhesive 30 that has been squeezed out from the outer edge portion of the chip body 26 does not unintentionally adhere to other members (for example the press member 20). As above, the separating member 32 has high releasing properties to the adhesive 30 and so even if the adhesive 30 adheres it can be readily released. A fluororesin tape formed as a thin film, for example, may be employed for the separating member 32.
In the present exemplary embodiment, as illustrated in detail in
In the illustrated example the cavity 36 is, as can be seen from
The size of the cavity 36 is, as illustrated in
When mounting the semiconductor chip 24 to the package substrate 16 and manufacturing a printed circuit board 38, first, as illustrated in
The semiconductor chip 24 is suctioned by the press member 20 through the separating member 32 so as to face towards the package substrate 16 and be retained at the opposite side of semiconductor chip 24 to the mounting stage 14.
The press member 20 is then driven, and the semiconductor chip 24 pressed towards the package substrate 16. At this stage, the bumps 28 of the semiconductor chip 24 are positionally aligned to face towards the sloping face 36S.
When the semiconductor chip 24 is moved towards the package substrate 16, the semiconductor chip 24 first makes contact with an apex portion of the adhesive 30. The semiconductor chip 24 is then pressed further towards the package substrate 16. At this stage, the separating member 32 softens due to heat, and an evenly distributed load F1 (pressing force) acts on the semiconductor chip 24. As illustrated in
A manufacturing method employing a manufacturing apparatus of a comparative example is illustrated in
In a manufacturing apparatus 112 of a comparative example, there is no cavity 36 (see
Sometimes the semiconductor chip 24 warps when the thickness of the semiconductor chip 24 is thin (rigidity is low). When the manufacturing apparatus 112 of the comparative example is employed, when the semiconductor chip 24 warps, the central portion of the semiconductor chip 24 approaches closer to the package substrate 16 than the outer edge portion of the semiconductor chip 24. Accordingly a greater reaction force F3 from the package substrate 16 acts on the central portion of the semiconductor chip 24 than on the peripheral edge portion of the semiconductor chip 24. The effective reaction force F2 from the package substrate 16 acting on the bumps 28 is accordingly smaller than would otherwise be the case.
The semiconductor chip 24 and the package substrate 16 often have different linear expansion coefficients to each other. Consequently, when deformation of the semiconductor chip 24 as described above is added, the semiconductor chip 24 can deform even further due to the differences in linear expansion coefficients.
When the semiconductor chip 24 deforms in this manner, the load (reaction force from the package substrate 16) acting on the bumps 28 decreases yet further since the bumps 28 are provided at peripheral edge portions of the chip body 26.
In comparison thereto, in the present exemplary embodiment, the cavity 36 is formed in the mounting stage 14. Moreover, the sloping face 36S faces towards the bumps 28 across the package substrate 16. Consequently, when the semiconductor chip 24 is pressed against the package substrate 16, as can be seen from
Accordingly, load transmission to the bumps 28 is better than in the structure of the comparative example. In other words it is possible to press the bumps 28 more certainly against the package substrate 16. There are also good contact characteristics of the semiconductor chip 24 to the package substrate 16, resulting in high mounting reliability.
After attaching the semiconductor chip 24 to the package substrate 16, as illustrated in
Note that the shape of the cavity is not limited to the entirely curved shape described above, and various other shapes may be employed, such as the examples illustrated in
A cavity 40 illustrated in
A cavity 42 illustrated in
The cavities 36, 40, 42 described above are close to the curved shape of the semiconductor chip 24 and the package substrate 16 when the semiconductor chip 24 is being pressed against the package substrate 16. Consequently, they are favorably shaped from the perspective of achieving uniform separation D1 between the semiconductor chip 24 and the package substrate 16 (see
In particular, the cavity 36 illustrated in
In contrast thereto, the central flat faces 40F, 42F are formed in the cavities 40, 42. Hence the cavities 40, 42 are accordingly easier to form than the cavity 36 due to being able to employ these central flat faces 40F, 42F as reference positions during forming the cavities 40, 42.
A cavity 44 illustrated in
In the cavity 44 the step faces 44S configuring the sloping portion are parallel to the outer edge flat face 34. Hence the cavity 44 is more easily shaped than the cavities 36, 40, 42 since no sloping faces are present, in contrast to the cavities 36, 40, 42.
A cavity 46 illustrated in
The cavity 46 is more easily shaped than the cavities 40, 42. Namely, with the cavities 40, 42, at the boundary portions between the central flat faces 40F, 42F and the sloping faces 40S, 42S, it is difficult to generate an accurate shape when some of the material generated during processing remains. However, in the cavity 46, the groove 46D acts as a portion into which the above remaining material enters.
The shapes of the cavities illustrated in
In a manufacturing apparatus 52 of the second exemplary embodiment, an outer edge flat face 54 and a cavity 56 are formed to a pressing face 20P of a press member 20.
The cavity 56 is indented so as to form an overall upwards facing curve, the reverse to the cavity 36 illustrated in
In the second exemplary embodiment, the cavity 36 (see
In the manufacturing method of the second exemplary embodiment, similarly to in the manufacturing method of the first exemplary embodiment, the semiconductor chip 24 is suctioned and held by the press member 20 so as to face towards a package substrate 16 supported on the support face 14S, with a separating member 32 interposed between the semiconductor chip 24 and the press member 20. The press member 20 is driven, and the semiconductor chip 24 is pressed towards the package substrate 16. The semiconductor chip 24 first makes contact with an apex portion of adhesive 30. When the semiconductor chip 24 is pressed further towards the package substrate 16, a load F1 (pressing force) acts on the semiconductor chip 24 through the separating member 32 that has been softened by heat.
When this occurs, the pressing face 20P in the second exemplary embodiment is formed with the cavity 56, and therefore, as illustrated in
In particular, since the semiconductor chip 24 initially makes contact at the central portions of the adhesive 30 and the package substrate 16, the heat from the press member 20 is transmitted at an early stage. In contrast thereto, heat transmission from the press member 20 to the peripheral edge portions of the adhesive 30 and the package substrate 16 acts later, and heat is also more readily dissipated therefrom to the periphery than from the central portions. The expansion amount of the central portion of the package substrate 16 is accordingly larger, such that the package substrate 16 curves so as to be upwards facing convex.
In the second exemplary embodiment, thus not only the semiconductor chip 24 but also the package substrate 16 curves, and so the separation D1 between the semiconductor chip 24 and the package substrate 16 is made more uniform than in the comparative example (see
Similarly to in the first exemplary embodiment, after attaching the semiconductor chip 24 to the package substrate 16, as illustrated in
Note that in the second exemplary embodiment, the shape of the cavity formed in the pressing face 20P is not limited to the shape illustrated in
In the first exemplary embodiment and the second exemplary embodiment, there is no particular limitation to the depth of the deepest portion of the cavity 36. However, a portion of the deformed separating member 32 enters into the cavity 36 when the semiconductor chip 24 is curved. Therefore, when the depth of the deepest portion is set at the thickness of the separating member 32 ±20% then deformation of the separating member 32 can be accommodated with certainty.
In a manufacturing apparatus 62 of the third exemplary embodiment, a mounting stage 14 is made for example from ceramic set with a linear expansion coefficient that is smaller (substantially no thermal expansion in practice) than that of a package substrate 16.
An indentation 64 is formed in a central portion of a mounting stage 14 (at the inside of an outer edge flat face 34). The indentation 64 in the illustrated example is formed with an indented rectangular shaped support face 14S in cross-section. The indentation 64, as viewed along a normal direction to a chip body 26 (the arrow A1 direction) is formed so as to be larger than the size of the external profile of the chip body 26. The depth of the indentation 64 is, as described later, set to a depth sufficient that a warping member 66 does not make contact when the warping member 66 is in a warped state.
The indentation 64 is covered by the warping member 66. In the present exemplary embodiment, the warping member 66 is formed as a thin film (diaphragm shape) from a metal with a linear expansion coefficient that is about the same as the linear expansion coefficient of the package substrate 16 (for example about 10 to 25 ppm/° C.). The periphery of the warping member 66 is fixed to an outer edge flat face 34. The warping member 66 does not curve in a normal state (for example in a state not pressed from the opposite side of the mounting stage 14), and configures a flat support face 68 on the opposite side to the contact face with the mounting stage 14.
However, when a central portion (a portion corresponding to the indentation 64) of the warping member 66 is pressed from the support face 68 side (the opposite side to that of the mounting stage 14), the warping member 66 curves so as to enter into the indentation 64. In particular, as illustrated in
In the manufacturing method of the third exemplary embodiment, the package substrate 16 is supported on the mounting stage 14 that is a support member through the warping member 66 (in contact with the support face 68).
Then, similarly to in the manufacturing method of the first exemplary embodiment, the semiconductor chip 24 is suctioned and held by the press member 20 through a separating member 32 so as to face towards the package substrate 16 being supported at the support face 68. The press member 20 is then driven, and the semiconductor chip 24 is pressed towards and against the package substrate 16. The semiconductor chip 24 first makes contact with an apex portion of adhesive 30. When the semiconductor chip 24 is then pressed further against the package substrate 16, an evenly distributed load F1 (pressing force) acts on the semiconductor chip 24 through the separating member 32 that has been softened by heat. The adhesive 30 pressed by the semiconductor chip 24 is pressed towards the mounting stage 14 whilst being squeezed out sideways.
In the third exemplary embodiment, the indentation 64 of the mounting stage 14 is covered by the warping member 66. Consequently, when the warping member 66 is pressed in this manner, as illustrated in
In the third exemplary embodiment, the separation D1 between the semiconductor chip 24 and the package substrate 16 is made more uniform than in the structure of the comparative example (see
Similarly to in the first exemplary embodiment and the second exemplary embodiment, after attaching the semiconductor chip 24 to the package substrate 16, as illustrated in
In particular, in the above example the linear expansion coefficient of the warping member 66 is similar to the linear expansion coefficient of the package substrate 16. Accordingly, when there is an uneven internal temperature distribution for the package substrate 16, deformation follows the unevenness in temperature, and the warping member 66 also warps. Consequently, the separation D1 between the semiconductor chip 24 and the package substrate 16 is made more uniform than in a different configuration in which the linear expansion coefficient of the warping member 66 is differs greatly to the linear expansion coefficient of the package substrate 16. The favorable effect on load transfer to the bumps 28 is accordingly enhanced.
Note that in the third exemplary embodiment, there are no particular limitations to the thickness of the warping member 66 as long as the desired warp shape can be realized when pressed by the adhesive 30 as described above. From this perspective, the thickness of the warping member 66 is preferably for example 0.2 mm or thinner. However, since the rigidity of the warping member 66 is lowered when the thickness is made too thin, the thickness of the warping member 66 is preferably for example 0.05 mm or greater from the perspective of obtaining the appropriate rigidity.
The respective manufacturing methods of all of the exemplary embodiments can be favorably applied to manufacture of the printed circuit board 38 when the semiconductor chip 24 is thin. Namely, when the semiconductor chip 24 is thick (for example a thickness of about 100 μm) then since the rigidity is high, warping such as illustrated in
In contrast thereto, when the semiconductor chip 24 is thin (for example a thickness of about 50 μm) then since the rigidity is low, warping such as illustrated in
Although embodiments of the technology disclosed herein have been explained above, the technology disclosed herein is not limited by the above, and it should be understood that it is possible to implement various modifications other than described above without departing from the spirit and scope of the technology disclosed herein.
According to the printed circuit board manufacturing method disclosed herein, a more uniform load pressing a semiconductor chip against a substrate is possible during mounting of a semiconductor chip to a substrate.
All examples and conditional language provided herein are intended for the pedagogical purposes of aiding the reader in understanding the invention and the concepts contributed by the inventor to further the art, and are not to be construed as limitations to such specifically recited examples and conditions, nor does the organization of such examples in the specification relate to a showing of the superiority and inferiority of the invention. Although one or more embodiments of the present invention have been described in detail, it should be understood that the various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the invention.
All cited documents, patent applications and technical standards mentioned in the present specification are incorporated by reference in the present specification to the same extent as if the individual cited documents, patent applications and technical standards were specifically and individually incorporated by reference in the present specification.
Number | Date | Country | Kind |
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2012-071795 | Mar 2012 | JP | national |