Claims
- 1. A semiconductor device comprising:
- a package having an inner bottom surface and an opening;
- a wiring board disposed on the inner bottom surface of the package and formed of a semiconductor substrate on which circuit wirings are formed;
- a plurality of semiconductor elements formed on the wiring board and electrically connected to the circuit wirings of the wiring board, each semiconductor element including a surface area;
- a first adhesive agent disposed between the wiring board and the inner bottom surface of the package to fix the wiring board on the package, the first adhesive agent having high thermal conductivity and being positioned in selected areas which are directly below the semiconductor elements, the size of each selected area being substantially equal to the surface area of the semiconductor element directly above the selected area;
- a second adhesive agent disposed between the wiring board and the inner bottom surface of the package to fix the wiring board on the package, the second adhesive agent having low elasticity and being positioned in an area other than the selected areas; and
- a cap for hermetically sealing the opening of the package.
- 2. The semiconductor device of claim 1, wherein at least one of the semiconductor elements generates a large amount of heat.
- 3. A semiconductor device comprising:
- a package having an inner bottom surface and an opening;
- a wiring board disposed on the inner bottom surface of the package and formed of a semiconductor substrate having circuit wirings formed thereon;
- a plurality of semiconductor elements formed on the wiring board and electrically connected to the circuit wirings of the wiring board, each semiconductor element including a surface area;
- an adhesive agent disposed between the wiring board and the inner bottom surface of the package to fix the wiring board on the package, the adhesive agent having high thermal conductivity and being positioned in selected areas which are directly below the semiconductor elements, the size of each selected area being substantially equal to the surface area of the semiconductor element directly above the selected area; and
- a cap for hermetically sealing the opening of the package.
Priority Claims (1)
Number |
Date |
Country |
Kind |
5-165961 |
Jun 1993 |
JPX |
|
Parent Case Info
This is a continuation of application Ser. No. 08/258,829 filed Jun. 13, 1994, now abandoned.
US Referenced Citations (4)
Foreign Referenced Citations (4)
Number |
Date |
Country |
3116859 |
May 1991 |
JPX |
4-11757 |
Jan 1992 |
JPX |
4-12557 |
Jan 1992 |
JPX |
4048769 |
Feb 1992 |
JPX |
Continuations (1)
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Number |
Date |
Country |
Parent |
258829 |
Jun 1994 |
|