Versatile Si-based packaging with integrated passive components for mmWave applications

Information

  • Patent Application
  • 20080029886
  • Publication Number
    20080029886
  • Date Filed
    August 03, 2006
    18 years ago
  • Date Published
    February 07, 2008
    16 years ago
Abstract
An apparatus is described incorporating an interposer having a cavity for a portion of an antenna structure, having conductor through vias, a top Si part having interconnection wiring and having pads for electrically mounting an integrated circuit chip thereon, wherein the top Si part mates with the interposer electrically and mechanically. The interposer and top Si part may be scaled to provide an array of functional units. The invention overcomes the problem of combining a high efficient antenna with integrated circuit chips in a Si package with signal frequencies from 1 to 100 GHz and the problem of shielding components proximate to the antenna and reduces strain arising from mismatching of TCEs.
Description

BRIEF DESCRIPTION OF DRAWINGS

These and other features, objects, and advantages of the present invention will become apparent upon consideration of the following detailed description of the invention when read in conjunction with the drawing in which:



FIG. 1 is a cross section view of a complete low-profile Si-based package containing a RFIC, integrated MEMS transmit/receive switch, and antenna. The drawing is not to scale.



FIG. 2 is a cross section view of a complete Si-based package containing a RFIC, integrated MEMS transmit/receive switch, and antenna in which the RFIC chip is not contained within the package. Such an approach could allow for high power RFIC devices to be cooled using external cooling methods. The drawing is not to scale.



FIG. 3A is a cross section view of a Si-based package in which the region/area above the antenna is backfilled with a suitable material, different from Si, with desirable RF properties. This would allow the use of a thicker antenna substrate, which would be mechanically more robust.



FIG. 3B is a cross section view of a Si-based package in which the region/area above the antenna is backfilled with a suitable dielectric material to create a lens above the antenna.



FIG. 4A a cross section view of a Si-based package with a shaped reflector with a desired geometry used to angle the direction of propagated antenna signal.



FIG. 4B is a cross section view of a Si-based package with a shaped antenna reflector used to focus antenna propagation signal.



FIG. 5A is a cross section view of a Si-based package with an edge-launched antenna structure. This approach does not require a reflector in the bottom of the antenna cavity.



FIG. 5B is a top-view of an edge-launched antenna structure shown in FIG. 5A.





DETAILED DESCRIPTION

In the first embodiment of this invention two, or more, parts fabricated from Silicon which contains an RFIC chip, RFIC chip cavity, an antenna cavity, thru-vias, an antenna and passive devices created using micromachining techniques are combined into one package. These two parts will then be bonded together to create an all-inclusive Si-based mmWave package as illustrated in FIG. 1. The lower part of the package consists of an interposer 1 fabricated from Si with etched cavities for the RFIC chip 21 and antenna structure 22 as well as thru-vias 3 for external I/O connections such as supply and control voltage etc. To ensure proper antenna efficiency and desired performance the cavity below the antenna is metal coated 41. The metal coated in the bottom of the cavity functions to reflect the antenna radiation back to the antenna structure 22, while the metal coated cavity walls 42 ensure the radiated signal does not propagate into the Si substrate 1 effectively reducing the electromagnetic radiation to other active components and improving antenna structure 22 efficiency as well. Similarly, the cavity for the RFIC chip 21 may be metal coated 43 to facilitate shielding. Depending on the intended application, an antenna 5 system as simple as a folded dipole or as complicated as a phased antenna array can be used. For printed circuit board attach, either C4 or BGA pads 31 are used in conjunction with the thru-vias 3. Interposer I may have a thickness in the range from 450 to 500 micrometers. Thru-vias 3 may be annular comprising Cu or W and may have a diameter in the range from 125 to 175 micrometers with 150 micrometers preferred. Metal coating 41 and 43 may be Cu. The assembled package (interposer 1 and Top Si part 6) and antenna structure may operate with frequencies in the range from 1 to 100 GHz and preferably in the range from 30 to 100 GHz. In addition to Si material for interposer 1 and top Si part 6, quartz material may be used.


Top Si part 6 contains the interconnect wiring 71-74, MEMS devices 8, and antenna 5 either inlaid or fabricated on top of the dielectric 12. Top Si part may be a thinned Si substrate having a thickness in the range from 150 to 450 micrometers. Interconnect wiring 71-74 and/or dielectric 12 may have a thickness in the range from 5 to 10 micrometers. Interconnect wiring 71-74 may be made in the same manner as Integrated circuit chip wiring or back end of the line (BEOL) wiring formed on chips. In most RF applications, it may be desirable to use high-resistivity Si for the top Si part 6 so as to improve antenna radiation and reduce losses associated with electromagnetic radiation dissipating into a conductive Si layer. Prior to bonding of the two Si parts, 1 and 6, the RFIC chip 9 is flip-chip bonded to the top part using either conventional C4 bump attach or using microbumps 10. If desired, combined hermetic sealing of both the RFIC chip 9 and MEMS devices 8 may be obtained using a seal ring consisting of the same bonding metallurgy 11 as the metal used for the bonding pads 32, which is used for the signal to propagate from the thru-vias 3 to the bonding pad 71 on top Si part 6. If only the MEMS devices 8 require hermetic sealing, a separate bonding, or seal-ring 111 may be used comprising gold tin, for example.



FIG. 1 may be reproduced side by side to show an array of bonded interposers and top Si parts where interposer 1 is common throughout the array and to Si part 6 is common throughout the array. The array would then have a plurality of cavities for forming respective portions of a plurality of antenna structures, a plurality of antennas, a plurality of integrated circuit chips (RF-ICs), and a plurality of interconnection wiring.


In a second embodiment, as illustrated in FIG. 2, the RFIC 9 chip is not embedded into a cavity in the Si interposer 1, rather it is bonded to the interconnect layers 75 on the back surface of top Si part 6. Such an approach could be useful for high power applications where the RFIC might require additional cooling.


In yet another embodiment, as illustrated in FIG. 3A, a thicker conventional non high-resistive top Si part or substrate 61 may be used and may include a dielectric material 131 suitable to ensure and enhance proper antenna performance.



FIG. 3B illustrates a top Si part or substrate 6 which contains a lens-like inlaid dielectric (132) used to focus the antenna signal propagation.


In yet another embodiment, the antenna structure 22 has a reflector cavity shaped as illustrated in FIG. 4A. The reflector cavity has a flat bottom surface tilted at an angle transverse to interposer 1 upper surface to direct the antenna propagation signal. In FIG. 4B, the cavity has a concave bottom surface with respect to interposer 1 upper surface to focus the antenna signal energy.



FIG. 5A and 5B illustrates another embodiment in where an edge-launched antenna structure (5) is used.


While the examples described only illustrates a MEMS switch and antenna combined in an hermetic package, this Si-based packaging approach can further include nearly any desired set of passive components commonly used at RF frequencies (1-100 GHz). For example, other applications might include large, or small value, decoupling/bypass capacitors, inductors with high Q-factors and large inductance values, resistors, resonators and filters (micromachined, piezoelectric, cavity, or LC) and high-performance interconnects may all be integrated within the Si package. Active RFIC chips fabricated using various semiconductor technologies can be attached to the package.


Another benefit of this approach compared to conventional packaging methods is that thermal expansion mismatch stresses are avoided since most, or all, components are fabricated from Si. Secondly, using integrated circuit (IC) processing techniques together with Si micromachining allow for fabrication of RF passives with far tighter design tolerances compared to devices constructed using low-temperature co-fired ceramic (LTCC) substrate, PCB or other plastic packaging technologies.


While there has been described and illustrated a Si-based package containing an RFIC chip, interconnection wiring, through vias, MEMS devices, and an antenna, it will be apparent to those skilled in the art that modifications and variations are possible without deviating from the broad scope of the invention which shall be limited solely by the scope of the claims appended hereto.

Claims
  • 1. An apparatus comprising: an interposer comprising a substrate having an upper and lower surface, said upper surface having at least one cavity for forming a portion of an antenna structure, said interposer including conducting through vias from said upper surface to said lower surface, said conducting through vias at said lower surface adapted for coupling to a source of electrical signals and a voltage supply,a top Si part having interconnection wiring on a lower surface and having first pads for electrically mounting an integrated circuit chip thereon,said top Si part having second pads on said lower surface mating with a plurality of conducting through vias at said upper surface of said interposer, and having an antenna positioned over said cavity for forming said antenna structure at times said top Si part is mated with said interposer.
  • 2. The apparatus of claim 1 wherein said interposer has at least one cavity for receiving an integrated circuit chip and wherein said first pads are positioned so that said integrated circuit chip is positioned in said cavity when said top Si part is mated with said interposer.
  • 3. The apparatus of claim 2 wherein said interposer and said top Si part are bonded together to form a perimeter seal around at least said integrated circuit chip.
  • 4. The apparatus of claim 1 wherein at least one of said at least one cavities has a bottom surface coated with a conductor.
  • 5. The apparatus of claim 1 wherein at least one of said at least one cavities has a bottom surface and a plurality of sidewalls coated with a conductor.
  • 6. The apparatus of claim 2 wherein said at least one cavity for receiving an integrated circuit chip has a plurality of sidewalls coated with a conductor to provide shielding from said antenna structure.
  • 7. The apparatus of claim 5 wherein said at least one cavity for receiving an integrated circuit chip has a plurality of sidewalls coated with a conductor.
  • 8. The apparatus of claim 1 further including a MEMs device positioned on said top Si part and coup led between said integrated circuit chip and said antenna structure.
  • 9. The apparatus of claim 1 wherein said integrated circuit chip has rf electrical signals with frequencies in the range from 1 to 100 GHz.
  • 10. The apparatus of claim 1 wherein said interposer is selected from the group consisting of Si and quartz.
  • 11. The apparatus of claim 10 wherein said top Si part is selected from the group consisting of Si and quartz whereby a thermal coefficient of expansion of said top Si part matches a thermal coefficient of expansion of said interposer.
  • 12. The apparatus of claim 1 wherein said top Si part includes a region of dielectric material extending from said lower surface to an upper surface over a portion of said antenna structure to enhance proper antenna performance.
  • 13. The apparatus of claim 1 wherein said top Si part includes a region of dielectric material shaped to form a lens over said antenna structure to focus the antenna signal propagation.
  • 14. The apparatus of claim 1 wherein said cavity has a flat bottom surface tilted at an angle with respect to said upper surface of said interposer.
  • 15. The apparatus of claim 1 wherein said cavity has a curved bottom surface to focus the antenna signal propagation.
  • 16. The apparatus of claim 1 wherein said antenna comprises two spaced apart electrodes increasing in space therebetween from one end to the other to provide antenna signal propagation away from said spaced apart electrodes where said spacing is greatest in the plane of said electrodes.
  • 17. The apparatus of claim 3 wherein said perimeter seal is a metal to metal hermetic seal.
  • 18. The apparatus of claim 17 wherein said perimeter seal extends around the edge of said upper surface of said interposer.
  • 19. The apparatus of claim 1 wherein said interconnection wiring comprises a plurality of layers, said layers comprised of dielectric and metal conductors, said layers spaced apart and interconnected by vias.
  • 20. The apparatus of claim 1 further including a plurality of cavities for forming respective portions of a plurality of antenna structures, a plurality of antennas, a plurality of integrated circuit chips, and a plurality of interconnection wiring.