1. Field of the Invention
The present disclosure relates to a device mounting board, a semiconductor module, and a method for fabricating the device mounting board.
2. Description of the Related Art
Although the use of ceramic material that excels in characteristics of thermal conductivity as an insulating layer is suitable for the purpose of spreading the heat generated by a power semiconductor device, a ceramic substrate is very expensive. In contrast, a control semiconductor device generates less heat than the power semiconductor device does. Thus, mounting the power semiconductor device and the control semiconductor device on the expensive ceramic substrate may be more than necessary. Besides, if the power semiconductor device and the control semiconductor device are mixed on the ceramic substrate with high thermal conductivity, the heat generated by the power semiconductor device will be transmitted to the control semiconductor device. This in turn heats the control semiconductor to a high temperature, causing a problem where the control semiconductor device becomes out of control (heat runaway). In order to resolve such a problem, the use of an insulating resin layer in which the insulating resin is filled with a ceramic filler is disclosed in Reference (1) in the following Related Art List.
As cited in Reference (1), it is difficult to achieve a technology where both high thermal conductivity and high dielectric breakdown characteristic can be attained by use of the insulating layer filled with the filler.
The present disclosure has been made in view of the foregoing circumstances, and one non-limiting and exemplary embodiment provides a technology capable of satisfying a characteristic of thermal conductivity and a dielectric breakdown characteristic required of a power semiconductor device mounting part and capable also of suppressing the transmission of the heat generated by a power semiconductor device to a control semiconductor device, in a device mounting board where the power semiconductor device generating much heat and the control semiconductor device low in the heat generation are mixed together. Here, a power transistor, such as a power MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) and IGBT (Insulated Gate Bipolar Transistor), or an LED device or the like may be used for the power semiconductor device, whereas a gate drive IC, an illuminance sensor, or the like may be used for the power semiconductor device.
One embodiment of the present invention relates to a device mounting board. The device mounting board includes: a metallic substrate; an oxide film formed such that surfaces of the metallic substrate are oxidized; an insulating resin layer provided on the oxide film that faces one main surface of the metallic substrate; and a wiring layer provided on the insulating resin layer, wherein the thickness of at least part of the oxide film is greater than that of the other parts of the oxide film.
Another embodiment of the present invention relates to a semiconductor module. The semiconductor module includes: the above-described device mounting board; and a semiconductor device electrically connected to the wiring layer, the semiconductor device being mounted on a main surface of the device mounting board on a side where the wiring layer is formed.
Still another embodiment of the present invention relates to a method for fabricating a device mounting board. The method for fabricating a device mounting board includes: forming a protruding portion on a predetermined region of a metallic substrate; roughing a surface of the protruding portion formed on the metallic substrate; forming an oxide film on a surface of the metallic substrate by performing an oxidation treatment; forming an insulating resin layer on the oxide film; and forming a wiring layer in a manner such that a metal layer is formed on the insulating resin layer and then the metal layer is selectively removed.
Additional benefits and advantages of the disclosed embodiments will be apparent from the specification and Figures. The benefits and/or advantages may be individually provided by the various embodiments and features of the specification and drawings, and need not all be provided in order to obtain one or more of the same.
These general and specific aspects may be implemented using a system, a method, and a computer program, and any combination of systems, methods, and computer programs.
Embodiments will now be described by way of examples only, with reference to the accompanying drawings which are meant to be exemplary, not limiting and wherein like elements are numbered alike in several Figures in which:
The present disclosure will now be described by reference to the exemplary embodiments. This does not intend to limit the scope of the present disclosure, but to exemplify the disclosure.
Hereinafter, the exemplary embodiments of the present disclosure or the present invention, will be described based on the accompanying drawings. The same or equivalent constituents, members, or processes illustrated in each drawing will be denoted with the same reference numerals, and the repeated descriptions thereof will be omitted as appropriate. The exemplary embodiments do not intend to limit the scope of the invention but exemplify the invention. All of the features and the combinations thereof described in the embodiments are not necessarily essential to the invention.
The device mounting board 100 is comprised of a metallic substrate 110, oxide films 120, an insulating resin layer 130, and a wiring layer 140.
The metallic substrate 110 may be a substrate formed of a metal, which displays good thermal conductivity, such as aluminum or an aluminum alloy. In the first embodiment, the metallic substrate 110 is an aluminum substrate. The thickness of the metallic substrate 110 may be 0.5 mm to 2 mm, for instance.
The oxide film 120 is an insulating film formed such that the surfaces of the metallic substrate 110 are oxidized. In the present embodiment, the oxide film 120 is formed of aluminum oxide (alumina). The oxide films 120 coat the top surface and the underside of the metallic substrate 110. Where the main surface of the device mounting board 100 is viewed planarly, the thickness H1 of a partial region of the oxide film 120 overlapped with the semiconductor device 200 is larger than the thickness H2 of regions surrounding said partial region thereof. More specifically, the thickness H1 of the oxide film 120, which coasts the main surface of the metallic substrate 110 on a side which the wiring layers 140 are provided, underneath the semiconductor device 200 is larger than the thickness H2 of regions surrounding said partial region thereof. Hereinafter, said partial region thereof that coats a top surface of the metallic substrate 110 will be referred to as an oxide film 120a and therefore this oxide film 120a will be distinguished from the other parts of the oxide film 120. Although, in the present embodiment, the oxide film 120a is formed across the entire region corresponding to the overlapped portion thereof with the semiconductor device 200, the oxide film 120a may instead be formed partially on the overlapped portion thereof with the semiconductor device 200. Also, the oxide film 120a may contain a part of regions that are not overlapped with the semiconductor device 200.
The thickness H1 of the oxide film may be, for example, 1.02 to 2 times the thickness H2 of the oxide film 120 excluding the oxide film 120a.
The insulating resin layer 130 is provided on the oxide film 120 that faces one main surface of the metallic substrate 110. The insulating resin layer 130 is laminated on the top surface of the oxide film 120. The material used to form the insulating resin layer 130 may be, for instance, a melamine derivative, such as BT resin, or a thermosetting resin, such as liquid-crystal polymer, epoxy resin, PPE resin, polyimide resin, fluorine resin, phenol resin or polyamide bismaleimide. From the viewpoint of improving the of the device mounting board 100, it is suitable that the insulating resin layer 130 has a high thermal conductivity. In this respect, the insulating resin layer 130 contains, as a high thermal conductive filler, alumina, aluminum nitride, silica, or the like, for instance. Thereby, the heat generated by the power semiconductor device 200 in particular can be released efficiently.
The thickness of the insulating resin layer 130 may be 50 μm to 250 μm, for instance. As described earlier, the film thickness H3 of the insulating resin layer 130 disposed underneath the semiconductor device 210 is smaller than the film thickness H4 of the insulating resin layer 130 disposed underneath the semiconductor device 200 by the increased thickness of the oxide film 120a over that of the surrounding regions of the oxide film 120.
The wiring layer 140 is provided on top of the insulating resin layer 130. The wiring layer 140, which is formed of copper, for instance, has a predetermined wiring pattern. The thickness of the wiring layer 140 may be 10 μm to 150 μm, for instance.
The semiconductor devices 200 and 210 are mounted on the main surface of the device mounting board 100 on a side thereof where the wiring layer 140 is formed. Device electrodes (not shown) at lower surface sides of the semiconductor devices 200 and 210 are electrically connected to the wiring layers 140 (electrodes) by way of solders 150. A metal paste or adhesive may be used instead of the solder. Device electrodes (not shown) at upper surface sides of the semiconductor devices 200 and 210 are wire-bonded to the wiring layers 140 using aluminum wires 152, for instance. Copper wires or gold wires may be used instead of the aluminum wires. In the present embodiment, an aluminum wire 152 connected to one of the device electrodes at the upper surface of the semiconductor device 210 and another aluminum wire 152 connected to one of the device electrodes at the upper surface of the semiconductor device 200 are both connected to a part of the wiring layer 140. For example, a control signal with which to control the operation of the semiconductor device 200 is transmitted from the semiconductor device 210 to the semiconductor device 200, and the semiconductor device 200 performs a switching operation according to the control signal.
(A Method for Fabricating a Device Mounting Board and a Semiconductor Module)
A manufacturing process for a semiconductor module including a device mounting board according to the first embodiment will now be described with reference to
As illustrated in
Then, as illustrated in
Then, an oxide film 120 is formed on the surfaces of the metallic sheet 109 by performing an oxidation treatment. In the first embodiment, as shown
The oxidation treatment of the metallic sheet 109 forms a surface layer 120, of the metallic sheet 109, which is the oxide film 120. As a result, as illustrated in
Then, as illustrated in
Then, as illustrated in
Then, as illustrated in
Then, as illustrated in
As described earlier, the thickness of the oxide film 120 is locally made thicker, so that a partial region, whose thermal conductivity and dielectric breakdown voltage are higher than that of regions surrounding said partial region. By mounting the semiconductor device 200, which is the heat generation source, above this partial region, both high thermal conductivity and high dielectric breakdown characteristic underneath the semiconductor device 200 can be attained. At the same time, the thickness of the insulating resin layer 130 underneath the semiconductor device 210, which is relatively low in heat generation, is larger than the thickness of the insulating resin layer 130 underneath the semiconductor device 200. This structure suppresses the transfer of heat generated by the semiconductor device 200 to the metallic substrate 110 and the transfer of the thus generated heat to the semiconductor device 210 via the metallic substrate 110. Thus, it is less likely to increase the temperature of the semiconductor device 210 via the metallic substrate 110 in the even that the semiconductor device 200 generates heat. As a result, the operation reliability of the semiconductor device 210 can be improved.
Also, the semiconductor module 1 according to the first embodiment is configured such that the semiconductor device 200 (power semiconductor device) and the semiconductor device 210 (control semiconductor device) are mounted on the above-described device mounting board 100. Thus, both high dielectric breakdown characteristic and high thermal conductivity in the power semiconductor device are ensured without causing an increase in temperature of the control semiconductor device. Hence, the operation reliability of the semiconductor module 1 can be improved.
(A Method for Fabricating a Device Mounting Board and a Semiconductor Module)
A manufacturing process for a semiconductor module including a device mounting board according to the second embodiment will now be described with reference to
As illustrated in
Then, as illustrated in
After this process of
Used in the second embodiment is the metallic sheet 109 where the tips of the protruding portions 111 are positioned further inwardly into and toward the metallic sheet 109 relative to the surfaces of the metallic sheet 109 where no protruding portions 111 is formed. Thus, the metallic sheet 109 as shown in
As described above, the protruding portion s 111 are provided in the metallic substrate 110 such that the tips of the protruding portions 111 are positioned further inwardly into and toward the metallic substrate 110 relative to the surfaces of the metallic substrate 110 where no protruding portions 111 is formed and such that the thickness of the oxide film 120 is locally made thicker. As a result, the metallic substrate 110 can be formed where the surface of the oxide film 120a, which is thicker than other regions thereof, is disposed at the same height of the surfaces of other regions thereof or the partial surface thereof is positioned further toward the metallic substrate 110 than the surfaces of the other regions thereof.
Since the surface of the region of the oxide film 120a is positioned at the same height of the surfaces of other regions thereof or is positioned further toward the metallic substrate 110 than the surfaces of the other regions thereof, the dielectric breakdown voltage of the oxide film 120a can be raised relative to the other regions thereof by the increased thickness of the oxide film 120a over that of the other regions of the oxide film 120. Also, when the surface of the insulating resin layer 130 facing the wiring layer 140 is formed flat, the film thickness of the insulating resin layer 130 on the oxide film 120 can be made thicker in the oxide film 120a, so that the dielectric breakdown voltage of the insulating resin layer 130 can be raised. In this manner, the dielectric breakdown strength of the device mounting board 100 can be improved and the dielectric breakdown can be suppressed and therefore the reliability can be improved.
The description has been given of the example where the four LED devices are mounted in
The present disclosure is not limited to the above-described embodiments and modifications only, and it is understood by those skilled in the art that various further modifications such as changes in design may be made based on their knowledge and the embodiments added with such modifications are also within the scope of the present disclosure.
Number | Date | Country | Kind |
---|---|---|---|
2011-213284 | Sep 2011 | JP | national |
This application is a continuation of International Application No. PCT/JP2012/006032, filed Sep. 21, 2012, which in turn claims the benefit of Japanese Application No. 2011-213284, filed on Sep. 28, 2011, the disclosures of which are incorporated by reference herein.
Number | Name | Date | Kind |
---|---|---|---|
20050272252 | Usui | Dec 2005 | A1 |
20080035943 | Slutsky et al. | Feb 2008 | A1 |
Number | Date | Country |
---|---|---|
05-191001 | Jul 1993 | JP |
2003-303940 | Oct 2003 | JP |
2006-100753 | Apr 2006 | JP |
2008-159647 | Jul 2008 | JP |
2011-222551 | Nov 2011 | JP |
Entry |
---|
International Search Report issued in International Application No. PCT/JP2012/006032 dated Dec. 25, 2012, with English translation, 5 pages. |
Number | Date | Country | |
---|---|---|---|
20140078687 A1 | Mar 2014 | US |
Number | Date | Country | |
---|---|---|---|
Parent | PCT/JP2012/006032 | Sep 2012 | US |
Child | 14089523 | US |