Claims
- 1. A packaged semiconductor device structure comprising:
- a ceramic base portion having lower and upper surfaces;
- a semiconductor chip fixed on a first area of said upper surface of the base portion and having a memory circuit;
- an organic shielding material formed on at least a part of the surface of said semiconductor chip for shielding the semiconductor chip from alpha-particles radiated from said ceramic cap portion; and
- a ceramic cap portion having lower and upper surfaces and hermetically connected at an area of its lower surface to a second area of the upper surface of the base portion with a low melting point glass material, said second area surrounding said first area, said ceramic cap and base portions forming a hollow space in which said semiconductor chip is located, the hermetic connection being formed at a temperature at which the organic material can decompose and produce a gas, whereby the gas pressure in the hollow space can increase to thereby lower the mechanical strength of the connection and adversely affect metallization connections of the semiconductor chip;
- wherein a getter material is disposed in said hollow space at a portion of said hollow space surrounding said semiconductor chip covered with said organic shielding material, for gettering said gas produced in said portion of the hollow space by said organic shielding material at a temperature which occurs when the cap portion is connected to the base portion with said low melting point glass material, thereby preventing increase of gas pressure in the hollow space and the resultant lowering of the mechanical strength of the connection, and thereby preventing an adverse effect on the metallization connections of the semiconductor chip due to said gas.
- 2. A packaged semiconductor device structure according to claim 1, wherein said memory circuit is a CCD memory circuit.
- 3. A packaged semiconductor device structure according to claim 1, wherein said organic shielding material has a thickness not less than 10 .mu.m.
- 4. A packaged semiconductor device structure according to claim 1, wherein said getter material includes at least one material selected from the group consisting of an alumina gel, an aluminasilicate gel, a silica gel and a high silicate glass.
- 5. A packaged semiconductor device structure according to claim 1, wherein said organic shielding material is made of a polyimide organic material.
- 6. A packaged semiconductor device structure according to claim 1, wherein said getter material includes a material in the form of granules or powder the particles of which contain open spaces substantially as small as the molecular diameter of one of H.sub.2 O, CO.sub.2, O.sub.2 and N.sub.2.
- 7. A packaged semiconductor device structure according to claim 1, wherein said organic shielding material covers only active regions of said semiconductor chip.
- 8. A packaged semiconductor device structure according to claim 1, wherein said organic shielding material covers an entire upper surface of said semiconductor chip.
- 9. A packaged semiconductor device structure according to claim 1, wherein said low melting point glass has a melting temperature between 410.degree. C. and 460.degree. C.
- 10. A packaged semiconductor device structure according to claim 1, wherein said memory circuit is a one-MOS dynamic memory circuit.
- 11. A packaged semiconductor device structure according to claim 1, wherein said memory circuits is a static circuit.
Priority Claims (1)
Number |
Date |
Country |
Kind |
55-40505 |
Mar 1980 |
JPX |
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Parent Case Info
This is a continuation of application Ser. No. 248,827, filed Mar. 30, 1984, abandoned.
US Referenced Citations (2)
Number |
Name |
Date |
Kind |
2686279 |
Barton |
Aug 1954 |
|
4427992 |
Ritchie et al. |
Jan 1984 |
|
Foreign Referenced Citations (2)
Number |
Date |
Country |
0058469 |
May 1977 |
JPX |
0130149 |
Oct 1980 |
JPX |
Non-Patent Literature Citations (3)
Entry |
"Dynamic Memories Racked by Radiation"-Electronics Jun., 1978, pp. 42-43. |
"Getter to Prevent Corrosion"-Goldman-IBM Technical Disclosure-vol. 17, No. 10, 3-1975, p. 2879. |
"Planar Multilevel Interconnection Technology Employing a Polyimide"-Mukai et al-IEEE Journal of Solid-State Circuits-Aug. 1978, pp. 462-467. |
Continuations (1)
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Number |
Date |
Country |
Parent |
248827 |
Mar 1984 |
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