Claims
- 1. A method of making a semiconductor module from existing integrated circuit dice, comprising:redistributing a first conductive pad disposed substantially on a planar surface of a first integrated circuit die from a position substantially along a median line of said planar surface to a redistributed conductive pad disposed near a periphery of said planar surface; stacking a second integrated circuit die adjacent to said planar surface and offset from said periphery; and electrically connecting a second conductive pad on said second integrated circuit die to said redistributed conductive pad.
- 2. The method of making a semiconductor module of claim 1, wherein said redistributing comprises:applying a conductive layer to said planar surface of said first integrated circuit die; and forming a redistributed conductive pad and a conductive trace from said conductive layer, where said conductive trace electrically connects said first conductive pad and said redistributed conductive pad.
- 3. The method of making a semiconductor module of claim 2, wherein said forming comprises etching said redistributed conductive pad and said conductive trace.
- 4. The method of making a semiconductor module of claim 2, wherein said applying comprises sputtering a conductive substance onto said planar surface of said first integrated circuit die.
- 5. The method of making a semiconductor module of claim 2, wherein said applying comprises sputtering copper onto said planar surface of said first integrated circuit die.
- 6. The method of making a semiconductor module of claim 1, further comprising, prior to said redistributing:providing said first integrated circuit die having said planar surface; forming an insulative layer on said planar surface, where said insulative layer has an insulative layer planar surface; creating said first conductive pad on said insulative layer planar surface; fabricating said redistributed conductive pad on said insulative layer planar surface; and electrically connecting said redistributed conductive pad to said first conductive pad.
- 7. The method of making a semi conductor module of claim 1, further comprising repeating said redistributing and said electrically connecting for each of multiple conductive pads located on said first integrated circuit die.
- 8. The method of making a semiconductor module of claim 1, wherein said stacking occurs in a staircase-like manner.
- 9. The method of making a semiconductor module of claim 1, further comprising, before said stacking, positioning a spacer between said first integrated die and said second integrated die.
- 10. The method of making a semiconductor module of claim 1, further comprising electrically connecting said redistributed conductive pad and said second conductive pad to a common electrical source, where said common slectrical source is selected from a group consisting of: a signal input, a signal output, a voltage supply, a reference voltage, an electrical ground, a combination signal input, an address signal input, and a terminator.
- 11. The method of making a semiconductor module of claim 1, further comprising, before said redistributing, relocating a third conductive pad disposed substantially on a second die planar surface of said second integrated circuit die from a position substantially along a median line of said second die planar surface to said second conductive pad disposed near a periphery of said second die planar surface.
- 12. The method of making a semiconductor module of claim 1, further comprising electrically connecting said redistributed conductive pad and said second conductive pad to a termination resistor internal to said semiconductor module.
- 13. The method of making a semiconductor module of claim 1, further comprising, prior to said redistributing, providing said first integrated circuit die having an insulative layer on said planar surface.
- 14. The method of making a semiconductor module of claim 13, wherein said redistributing comprises:sputtering a conductive substance onto said insulative layer to form a conductive planar surface; applying a resist layer to said conductive planar surface; masking said resist layer, such that said first conductive pad, said redistributed conductive pad, and a trace connecting said redistributed conductive pad to said first conductive pad, are masked. removing said resist layer, except where masked; etching said conductive planar surface to remove said conductive substance, at all locations, except where said resist layer is formed; clearing the remaining resist layer to expose said first contact pad, said redistributed conductive pad, and said trace connecting said redistributed conductive pad to said first conductive pad.
- 15. The method of making a semiconductor module of claim 14, wherein said etching occurs via a chemical process.
- 16. The method of making a semiconductor module of claim 14, wherein said clearing occurs via a chemical process.
- 17. A method of making a semiconductor module from existing integrated circuit dice, comprising:providing a first integrated circuit die having an insulative layer planar surface, and having a first conductive pad disposed substantially on said insulative layer planar surface and disposed substantially along a median line of said insulative layer planar surface; sputtering a conductive substance onto said insulative layer planar surface to form a conductive planar surface; applying a resist layer to said conductive planar surface; masking said resist layer, such that said first contact pad, a redistributed conductive pad disposed near a periphery of said first integrated circuit die, and a trace connecting said redistributed conductive pad to said first conductive pad, are masked; removing said resist layer, except where masked; etching said conductive planar surface to remove said conductive substance, at all locations except where said resist layer is formed; clearing the remaining resist layer to expose said first contact pad, said redistributed pad, and said trace connecting said redistributed conductive pad to said first conductive pad; stacking a second integrated circuit die adjacent to said first integrated circuit die and offset from said periphery; and electrically connecting a second conductive pad on said second integrated circuit die to said redistributed conductive pad.
- 18. The method of making a semiconductor module of claim 17, further comprising, before said providing, relocating a third conductive pad disposed substantially on a second die planar surface of said second integrated circuit die from a position substantially along a median line of said second die planar surface to said second conductive pad disposed near a periphery of said second die planar surface.
Parent Case Info
This application is a divisional of U.S. application Ser. No. 09/685,941 filed Oct. 10, 2000 now U.S. Pat. No. 6,376,904, which is a continuation-in-part of U.S. application Ser. No. 09/471,304 filed Dec. 23, 1999.
US Referenced Citations (13)
Continuation in Parts (1)
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Number |
Date |
Country |
Parent |
09/471304 |
Dec 1999 |
US |
Child |
09/685941 |
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US |