Patent Application
20080014678
The above and further advantages of the invention may be better understood by referring to the following description in conjunction with the accompanying drawings, in which:
While the making and using of various embodiments of the present invention are discussed in detail below, it should be appreciated that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed herein are merely illustrative of specific ways to make and use the invention and do not delimit the scope of the invention.
In one embodiment, the present invention solves the problem of creating a connection to the metal layer over the mold material by using a grounded wirebond (with a package-high loop) from the die/substrate to the top of the mold cap (and, e.g. back to the die/substrate connected to the ground bus on the die/substrate). After the molding is completed, the wire loops that have been added are exposed at the surface of the mold cap for all the packages prior to saw singulation. This exposure can be further enhanced by a dry etch process to guarantee a good electrical connection to these gold wires. A thin 100 to 1000 Angstrom metal layer (e.g., Al, copper, gold or other metal that does not corrode easily) can be sputtered to the surface of the package to act as an EMI/ESD protective layer. The metallization can act to attenuate electromagnetic waves incident upon this layer and contain them within or outside the package.
The integrated circuit structure may include one or more integrated circuit elements operable to generate an electromagnetic field when an electric current is applied to the integrated circuit. The structure also includes an encapsulating compound (mold material) substantially surrounding the one or more integrated circuits on a substrate. A wire loop extending through the encapsulating compound to the top of the encapsulating compound provides electrical connection between top EMI film and package ground.
The present invention can also be a method of providing electrical connections between top EMI films and ground for molded packages having a package height and containing an integrated circuit (e.g., single chip configuration, stacked chip configuration, flip chip configuration, multi-chip configuration, etc.). The method may include the steps of providing a first integrated circuit die on a first substrate area, and an at least package-height wirebond with at least one end connected to a ground either on the first area or on the first integrated circuit, providing a second integrated circuit die on a second substrate area and an at least package-height wirebond with at least one end connected to a ground either on the second substrate area or on the second integrated circuit, encapsulating the first and second integrated circuits and first and second areas of the substrate with insulating mold-material, and depositing a metal film in electrical connection with the wirebonds. The wirebonds provide electrical connections between the metal film and grounds of the substrate areas, or on the first or second integrated circuit. Cutting can provide separate packages, wherein each package has a substrate, an integrated circuit, encapsulating mold-material, a portion of the metal film, and a wirebond electrical connection, whereby the portion of the metal film serves as an EMI film, and a wirebond electrical connection grounds the EMI film.
Note the initial filling of mold material may be later reduced by etching (or polishing) down to a final package height and thus that the package-height wirebonds may be initially either shorter than the package height and then exposed during etching of the mold material down to the final package height, or greater than package height and pushed down to the final package height during the injection molding process (or pushed down to below the final package height during the injection molding process and then exposed during etching of the mold material down to the final package height). In the final package the top of the package-height wirebonds is to be at the level of and making electrical contact to the EMI film.
In a single overmold cavity process, the spacing between the packages is minimized to minimize the substrate costs, and this minimization led to the use of a saw singulation process for the packages. In the past processes, thin layers of metallization were plated to the surface of the mold cap for each individual package cavity with connection achieved by plating to specific ground connections on the substrate which were exposed for this very purpose. The saw singulation process does not leave any surface of the substrate exposed for this purpose, thus this past process is unavailable.
The present invention also provides a method of providing an electrical connection between a top EMI film and ground for a molded package containing at least a first semiconductor die (e.g., single chip configuration, stacked chip configuration, flip chip configuration, multi-chip configuration, etc.). The method may include the steps of providing wires between the die and a first substrate area using first and second loop bondwires having first and second heights, and providing a third wirebond having a wirebond end connected either to a ground on the first substrate area or to a ground on the die, with the third wirebond having a height greater than the heights of the first and second bondwires, covering the die with insulating mold-material to a height greater than the heights of the first and second bondwires, and depositing a top EMI film in electrical connection with an exposed portion of the third wirebond, wherein the third wirebond provides an electrical connection between a top EMI film and either a ground of the substrate, or a ground on the die. The covering the die with deposited insulating mold-material can also be with at least substantially covering of the third wirebond, and the insulating mold-material is then being etched to expose a portion of the third wirebond, but not expose either of the first or second bondwires. In some of these embodiments, a second semiconductor dies is wired to second area of the substrate with the second die having fourth and fifth bondwires with fourth and fifth heights, and providing a sixth wirebond having a wirebond end connected either to a ground on the second substrate area or to a ground on the second die, with the sixth loop wirebond having a height greater than the heights of the fourth and fifth loop wirebonds, and wherein the first and second dies and the first and second substrate areas are covered with insulating mold-material to a height greater than the heights of the first, second, fourth, and fifth bondwires, and a top EMI film in electrical connection with the third and sixth wirebonds is deposited over the dies and the substrate areas, and wherein sawing then provides separate packages, with each package having a substrate, integrated circuit mold-material, a top EMI film, and electrical connections between a top EMI films and ground, with a first package containing the first die and a second package containing the second die. Preferably, a saw singulation process is used in separating the packages. The EMI film is preferably sputtered onto the exposed portion of the third (top-film-grounding) loop wirebond and onto a top surface of the insulating mold-material and the EMI film is preferably of aluminum, copper, or gold and between 100 and 1,000 Angstroms thick and the die is preferably an integrated circuit.
In some embodiments of these embodiments, at least two wirebonds are used in a contacting crossing configuration provide a reinforced EMI-film grounding connection. Thus wires may be supported by a crossing two wire loops with the wires preferably touching at the apex such that a top view, not shown, would show the two crossing wire loops making an “X” (not necessarily at right angles). Crossing wire loops preferably have wire ends bonded to the substrate, but wire ends bonded to the die could be used.
The insulating mold-material can be injected with a mold-sweep profile that avoids excess lowering of the height of the top-film-grounding wirebond, thus generally avoiding a wirebond height in which the EMI film does not make electrical contact with the wirebond.
The insulating mold-material may be injected with a mold-sweep profile that lowers heights of the top-film-grounding loop wirebond to a lower height, as long as the etch still exposes a portion of the top-film-grounding loop wirebond.
Thus the present invention can also be a molded integrated circuit package 50 having an electrical connection between a top EMI film 51 and ground inside the molded package 50, that includes an integrated circuit 24 with at least two less-than-package-height bondwires 56 to a substrate 16 and an at least one package-height wirebond 52, with the package-height wirebond 52 having at least one end connected to a ground either on the substrate 16 or on the integrated circuit 24, an insulating mold-material 14 covering the integrated circuit 24 and substrate 16 with to a height greater than the less-than-package-height bondwires 56, but not greater than the package-height loop wirebond 52, and a top EMI film 51 over the insulating mold-material 14 and in electrical connection with a portion of the package-height wirebond 52, whereby the package-height wirebond 52 provides an electrical connection between a top EMI film 51 and is grounded on the substrate 16 or the integrated circuit 24, providing a package with an EMI film 51 grounded by a wire 52 inside the molded package 50. Again note that the package-height wirebonds 52 may be initially either shorter than the package height and then exposed during etching of the mold material down to the final package height; or greater than package height and pushed down to the final package height during the injection molding process (or pushed down to above the final package height during the injection molding process and then exposed during etching of the mold material down to the final package height).
It may be noted that an alternate approach to attenuating EMI is described in published patent application 20050206015 “System and method for attenuating electromagnetic interference” to Salzman, et al, which describes use of an encapsulating compound includes an electromagnetic field-attenuating material for attenuating electromagnetic interference.
Although the present invention has been described with several embodiments, diverse changes, substitutions, variations, alterations, and modifications may be suggested to one skilled in the art, and it is intended that the invention encompass all such changes, substitutions, variations, alterations, and modifications as fall within the spirit and scope of the appended claims.
