Patent Application
20140374912
This invention relates to integrated circuits, and is particularly applicable to integrated circuit die/substrate assemblies, and to method for mounting integrated circuit dies on support substrates, for example, to produce in packaged semiconductor devices.
The phrase “circuit assembly” refers both to an assembled/packaged electronic device/system and to the process of electrically and mechanically connecting one or more electronic components (e.g., a bare integrated circuit (IC) die or a packaged IC device) to a printed circuit support structure (e.g., a package substrate or a printed circuit board (PCB)) in a way that forms such electronic devices/systems. A semiconductor package is one type of circuit assembly including a metal, plastic, glass, or ceramic casing containing one or more “bare” semiconductor electronic components (typically referred to as IC die or “chips”) that performs a specified function (e.g., providing non-volatile memory or performing microprocessor functions). Individual discrete components are formed using known semiconductor fabrication techniques (e.g., CMOS) on silicon wafers, the wafers are then cut (diced) to form individual IC die, and then the IC die are the assembled in a package (e.g., mounted on a package substrate similar to a printed circuit board). The package provides protection against impact and corrosion, holds the contact pins or leads which are used to connect from external circuits to the device, and dissipates heat produced in the IC die. Other types of circuit assemblies include, for example, printed circuit board (PCB) assemblies, which typically include a large number of packaged IC devices and other components that are electrically and mechanically secured to a host PCB.
Currently, the process of assembling components into fully functional printed circuit boards and is universally dependent on the use of solder to make electrical connections. Because of environmental concerns, the solder, which used to contain lead, is now lead free with the consequence that the temperature at which the solder melts and reflows is significantly higher than that of the lead containing solder. This higher temperature means that, after the solder has solidified, the remaining temperature drop back to room temperature causes greater stress to build up due to the temperature coefficient of expansion (TCE) mismatch between components. This is a particular problem for components such as state of the art silicon VLSI devices, where the use of low-dielectric constant (low k) and strain engineered finer geometry devices have made the devices more susceptible to TCE-induced stress than prior generations. It is also the case that since the solder forms large area metal-metal bridges across the gap between components, that the assembled components are mechanically attached as well, sufficient to pass shock and vibration tests.
Micro-spring technology was recently developed to address the TCE-induced stress problems associated with lead-free solder connections. Micro-springs are batch-fabricated on a host substrate (i.e., either the IC die or the package base substrate), for example, using stress-engineered thin films that are sputter-deposited with a built-in stress gradient, and then patterned to form individual flat micro-spring structures having narrow finger-like portions extending from associated base (anchor) portions. The narrow finger-like portions are then released from the host substrate (the anchor portion remains attached to the substrate), whereby the built-in stress causes the finger-like portions to bend (curl) out of the substrate plane with a designed radius of curvature, whereby the tip end of the resulting curved micro-spring is held away from the host substrate. The host substrate is then mated with a corresponding structure such that the tip ends of the micro-springs abut corresponding metal contact pads, whereby the (electrically conductive) micro-spring interconnect structures facilitate electrical signal transmissions between the host substrate (e.g., an IC die) and a corresponding structure (e.g., a package base substrate). By compressing the chip and board together, pressure contacts are formed by the micro-springs which have been shown to pass the requisite JEDEC tests of temperature cycling and exposure to high humidity, thereby making micro-spring interconnect structures an attractive alternative to lead-free solder connections.
Current methods for securing two components that are electrically connected by micro-springs (e.g., securing IC dies to package base substrates) typically requires the use of an adhesive disposed in the narrow gap between the two components in order to maintain contact between the micro-springs and associated contact pads. Unfortunately, the required adhesive dispensing and curing processes are typically not employed by the companies that assemble printed circuit boards and packed IC devices in high volumes. The inclusion of the adhesive dispensing and curing processes thus presents a barrier to easy adoption of the micro-spring technology. In addition, adhesives cannot be used in some high reliability electronics packaging and military applications because of organic outgassing risks, which limit ultimate reliability.
One possible alternative technique for securing two components by micro-spring without adhesive is to secure the ends of the micro-springs by solder. In this approach, the micro-springs are formed on one component as described above, and solder paste is deposited on the associated second component in a manner similar to conventional solder-based assembly. During assembly, the free ends (tips) of the micro-springs are pushed into the solder paste, and then the assembly is subjected to a conventional reflow step. Unfortunately, although the electrical connections made by this method survive JEDEC temperature and humidity tests, adhesive is still required, e.g. corner bonds, to pass shock and vibration tests, which is problematic for the reasons provided above.
What is needed is a low-cost method for reliably securing two components (e.g., an IC die to a package support structure) using micro-springs that avoids the need for adhesives.
The present invention is directed to a low-cost circuit assembly and associated circuit assembly method that utilizes both curved micro-spring interconnect structures (micro-springs) and one or more solder-based interconnect structure to electrically and mechanically secure a device (e.g., an integrated circuit (IC) die/chip, a packaged IC device, or a circuit element such as a light emitting diode (LED)) to a printed circuit support structure (e.g., a package substrate or a printed circuit board (PCB)). Specifically, the micro-spring connectors are deployed using existing micro-spring techniques to provide compliant electrical connections between the IC device and the support structure, and the one or more solder-based interconnect structure is formed using substantially conventional techniques to provide a rigid mechanical connection between the device and support. By combining the use of micro-spring and solder-based connections, the present invention provides a cost-effective solution to the problems associated with conventional attachment methods. First, by utilizing the solder-based interconnect structures solely for mechanical connection (i.e., by utilizing micro-springs to provide all or most of the electrical connections), the number of solder-based interconnect structures can be minimized, thereby minimizing the TCE-induced stress problems associated with solder-only interconnect schemes. Second, because the solder-based interconnect structures essentially “weld” the two components together, the resulting assembly is reliably secured without the need for adhesive, thereby avoiding the cost and other considerations currently hampering adoption of micro-spring interconnect technology. Third, because the final assembly process is essentially identical to conventional solder-based assembly processes, the circuit assembly method of the present invention facilitates an almost seamless transition from all-solder assembly processes to micro-spring interconnect technology. That is, the present invention allows circuit assemblers to utilize their existing (e.g., standard solder reflow) assembly equipment without adding any new steps to the assembly process, thereby providing their customers with circuit assemblies that incorporate the beneficial aspects of micro-spring technology along with reliable permanent rigid mechanical connections without increasing assembly costs.
In accordance with alternative embodiments of the present invention, the one or more solder-based interconnect structure is connected between the IC device and the support structure either by way of “dummy” contact pads (i.e., metal pads that do not form an electrical connection between the IC device and the support structure) or using “functional” contact pads. The “dummy” contact pads are formed simultaneously with “functional” contact pads (i.e., using the same design rules/sizes and materials as conventional contact pads associated with the micro-springs), but are electrically isolated from processed circuitry. In an alternative embodiment, the solder-based interconnect structures are formed between functional contact pads that transmit, for example, a ground potential between the associated components.
According to another embodiment of the present invention, the micro-spring interconnect structures are disposed in a peripheral area of the circuit assembly (i.e., adjacent to a peripheral edge of the device/component) and the one or more solder-based interconnect structure are located in a central area such that it is substantially surrounded by the micro-springs. By positioning the micro-springs around the periphery, whether the micro-springs are disposed to make pressure (solder-free) contact or be connected by way of solder, the micro-springs would not be placed under significant mechanical stress from vibration or shock. The “dummy” (contact pads (i.e., those used for the solder-based interconnect structures) are sized to facilitate maximum capillary forces that act in the molten solder to pull the associated components together (i.e. maximum perimeter length within some areal constraints). In one specific embodiment, several sets of “dummy” contact pads are located close to each other (e.g., clustered in a central region of the circuit assembly) in order to minimize the effects of TCE mismatch. In another specific embodiment, the “dummy” contact pads are laid out in a manner that maximizes the capillary forces that act in the molten solder to pull the components together (i.e. maximum perimeter length within some areal constraints).
According to yet another embodiment of the present invention, the solder-based interconnect structures are located such that they maximize heat conductance in the circuit assembly. For example, the solder-based interconnect structures may be positioned form a perimeter around a “hot spot” (region of high temperature) and thermally coupled to a material with a higher thermal conductivity (e.g., a material with a much lower melting point, such as indium) that is either deposited prior to reflow, or capillaried in subsequent to reflow to provide superior heat management.
These and other features, aspects and advantages of the present invention will become better understood with regard to the following description, appended claims, and accompanying drawings, where:
The present invention relates to an improvement in semiconductor packaging and other semiconductor circuit assemblies. The following description is presented to enable one of ordinary skill in the art to make and use the invention as provided in the context of a particular application and its requirements. As used herein, directional terms such as “upper”, “upward”, “top”, “lower”, “downward”, and “side” are intended to provide relative positions for purposes of description, and are not intended to designate an absolute frame of reference. Various modifications to the preferred embodiment will be apparent to those with skill in the art, and the general principles defined herein may be applied to other embodiments. Therefore, the present invention is not intended to be limited to the particular embodiments shown and described, but is to be accorded the widest scope consistent with the principles and novel features herein disclosed.
Referring to the lower portion of
In accordance with an embodiment of the present invention, support structure 110 also includes one or more electrically isolated “dummy” (non-functional) contact pads that are formed on an upper surface 111. For example, (second) support contact pad 117-3 is disposed on upper surface 111 such that it is electrically isolated from all conductors that form signal paths between upper surface 111 and lower surface 112. In a specific embodiment, “dummy” support contact pad 117-3 is formed by the same process used to form “functional” support contact pads 117-1 and 117-2 (i.e., the composition and thickness of “dummy” contact pad 117-3 is essentially identical to that of support contact pads 117-1 and 117-2). As described below, these “dummy” (non-functional) support contact pads serve a mechanical connection function, and as such may be formed by a modified PCB fabrication process that provides a more robust structure for providing a reliable mechanical connection.
Referring to the upper portion of
Similar to support structure 110, IC die 120 is fabricated to include one or more electrically isolated “dummy” device contact pads that are formed on passivation layer 125 and exposed on processed surface 122. For example, (second) device contact pad 127-3 is disposed on lower surface 122 such that it is electrically isolated by passivation material from integrated circuit 124 (i.e., no conductors form signal paths between device contact pad 127-3 and integrated circuit 124). “Dummy” device contact pad 127-3 is formed using the same metallization process utilized to form “functional” device contact pads 127-1 and 127-2, and serve the mechanical connection function described below.
According to an aspect of the present invention, IC die 120 is mounted on package substrate (support structure) 110 in a standard flip-chip orientation such that processed surface 122 faces upper surface 111 of package substrate 110. Note that the standard flip-chip orientation causes processed surface 122 to become the lower (downward-facing) surface of IC die 120 in the finished assembly, with unprocessed surface 121 forming the upper (upward facing) surface of IC die 120.
According to another aspect of the present invention, IC die 120 is electrically connected to support structure 110 by way of a curved micro-springs 130, and IC die 120 is mechanically connected to support structure 110 by way of one or more solder-based interconnect structure 140, wherein both micro-springs 130 solder-based interconnect structures 140 are disposed in a gap region GAP defined between processed surface 122 and upper substrate surface 111. In one embodiment, in addition to the presence of micro-springs 130 and solder-based interconnect structures 140, the entire remaining volume of gap region GAP is filled with air (i.e., micro-springs 130 and solder-based interconnect structures 140 extend through an air-filled gap region between IC die 120 and support structure 110.
Each curved micro-spring 130 (e.g., micro-springs 130-1 and 130-2, see
As used herein, the phrase “solder-based interconnect structure” refers to any (preferably lead-free) solder connection structure utilized in semiconductor packaging or PCB assembly, such as structures formed from solder bumps, solder balls, and other solder-based structures typically utilized in standard reflow soldering processes. Lead-free solder material typically includes tin, copper and silver, and optionally include one or more of bismuth, indium, zinc, antimony, and traces of other metals. As indicated in
According to another aspect of the disclosed embodiment depicted in
According to a second aspect of the assembly shown in
As indicated by the dashed-line arrows in
As indicated in
As indicated in
The method presented above eliminates or minimizes the use of adhesives to provide a packaging approach that is primarily inorganic, which is desirable in military, DoD and high-rel commercial applications. That is, the gap region GAP between IC die 120 and support structure 110 is preferably air-filled or filled with an inert material. However, in some applications the mechanical connection between IC die 120 and support structure 110 may be enhanced by inserting an adhesive into gap region GAP. The method is performed using standard microelectronics, assembly and solder reflow equipment in order to minimize changes to existing assembly lines.
In one embodiment the “dummy” contact pads to which solder-based interconnect structures 140-1 to 140-4 are attached, which are similar to contact pads 117-3 and 127-3 (described above with reference to FIG. 1(A)), are sized to facilitate maximum capillary forces that act in the molten solder to pull the associated components together (i.e. maximum perimeter length within some areal constraints). The capillary forces pulling the two elements together are proportional to the circumference of the solder “pool” once it is molten. A contact pad with a “crenelated or wavy” edge would have a greater circumference to area ratio and hence a higher attractive force, and since the pool edge is defined by the metal contact pads, this perimeter can be lithography defined.
According to another embodiment, solder-based interconnect structures 140-1 to 140-4 are located around a perimeter 149 of a “hot spot” (i.e., a localized area of higher than average temperature) of IC die 120A. Because solder acts a good thermal conductor, solder-based interconnect structures 140-1 to 140-4 are designed and laid out explicitly to overlay the parts of IC die 120A which generate the most heat (e.g., the area delineated by perimeter 149), where solder-based interconnect structures 140-1 to 140-4 act as pathways to remove heat from device 100A, e.g., through copper-filled through board vias (not shown) provided on support structure 110A. Expanding on this heat-removal function, solder-based interconnect structures 140-1 to 140-4 are designed to form a perimeter around the hot spot, and in this embodiment include a solder material component having a higher thermal conductivity (e.g. a much lower melting point material such as indium) that is either deposited prior to reflow, or capillaried in subsequent to reflow to provide superior heat management.
As described above, each micro-spring is an etched interconnect structure that attaches on one end to a carrier device (e.g., IC die 120 in the first embodiment) and on the other end to a mating device (e.g., support structure 110), and serves as an improvement to both existing micro-spring and solder-type interconnections between a chip package and a carrier/substrate/interconnect board. In alternative embodiments the role of host substrate for the micro-springs is performed by the support substrate. For example, as illustrated by packaged semiconductor device (circuit assembly) 100B in
Although the present invention has been described with respect to certain specific embodiments, it will be clear to those skilled in the art that the inventive features of the present invention are applicable to other embodiments as well, all of which are intended to fall within the scope of the present invention. For example, as indicated in
