SEMICONDUCTOR DEVICE WITH BATTERY

Abstract

An embodiment of a pseudo nonvolatile memory device incorporating a high capacity micro battery includes a DRAM chip having bonding pads. The DRAM chip may be attached to a frame. The frame may have external connecting terminals corresponding to the bonding pads. Wires are provided for electrically connecting the bonding pads to corresponding external connecting terminals. The bonding pads and the wires may be covered with an encapsulant. A micro battery is provided over the DRAM chip. The micro battery may supply power to the DRAM chip.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The invention is described below in relation to several embodiments illustrated in the accompanying drawings. Throughout the drawings like reference numbers indicate like exemplary elements, components, or steps, and the thickness of layers may be exaggerated for clarity.

FIG. 1 is a perspective view illustrating a micro battery according to an example embodiment.

FIG. 2 is a perspective view of region B of FIG. 1.

FIGS. 3 and 4 are perspective views to show portions of the micro battery according to an example embodiment.

FIG. 5 is a cross-sectional view taken along line I-I′ of FIG. 1.

FIGS. 6 to 8 are cross-sectional views taken along line II-II′ of FIG. 1.

FIG. 9 is a cross-sectional view illustrating an organization of a semiconductor package incorporating a micro battery according to an example embodiment.

FIG. 10 is a cross-sectional view taken along line III-III′ of FIG. 9.

FIG. 11 through FIG. 13 are cross-sectional views illustrating semiconductor packages incorporating a battery, according to other example embodiments.

Claims

1. A pseudo nonvolatile memory device, comprising: a DRAM chip having bonding pads;a frame having external connecting terminals that correspond to the bonding pads, the frame attached to the DRAM chip;wires for electrically connecting the external connecting terminals to the bonding pads, respectively; anda micro battery for supplying power to the DRAM chip, which is positioned over the DRAM chip.

2. The pseudo nonvolatile memory device of claim 1, wherein the micro battery has a smaller size than an aggregated one of the frame and the DRAM chip.

3. The pseudo nonvolatile memory device of claim 1, wherein the micro battery comprises: a first current collector having a plurality of through holes;a first active material layer to cover both inner walls of the through holes and at least a portion of the first current collector;an electrolyte layer on the first active material layer; anda second active material layer on the electrolyte layer.

4. The pseudo nonvolatile memory device of claim 3, wherein the second active material layer fills the through holes.

5. The pseudo nonvolatile memory device of claim 3, wherein the first active material layer covers both opposing sides of the first current collector.

6. The pseudo nonvolatile memory device of claim 3, further comprising: a first connector electrically connected to the first current collector; anda second connector electrically connected to the second active material layer.

7. The pseudo nonvolatile memory device of claim 1, wherein the micro battery is arranged inside of an encapsulant that covers both the bonging pads and the wires.

8. A semiconductor package incorporating a micro battery comprising: a semiconductor chip having bonding pads;a frame having external connecting terminals corresponding to each of the bonding pads, the frame attached to the semiconductor chip,wires electrically connecting the bonding pads to the external connecting terminals; anda micro battery for supplying power to the semiconductor chip that is positioned over the semiconductor chip,the micro battery comprising: a first current collector having a plurality of through holes;a first active material layer to cover inner walls of the through holes and at least a portion of the first current collector;an electrolyte layer disposed on the first active material layer; anda second active material layer disposed on the electrolyte layer.

9. The semiconductor package incorporating the micro battery of claim 8, wherein the semiconductor chip includes a volatile memory cell.

10. The semiconductor package incorporating the micro battery of claim 8, wherein the second active material layer fills the through holes.

11. The semiconductor package incorporating the micro battery of claim 8, wherein the first active material layer covers both opposing sides of the first current collector.

12. The semiconductor package incorporating the micro battery of claim 8, further comprising: a first connector electrically connected to the first current collector; anda second connector electrically connected to a second current collector that is connected to the second active material layer.

13. The semiconductor package incorporating the micro battery of claim 8, wherein the first current collector comprises one selected from the group consisting of nickel, aluminum, platinum, copper, and stainless steel.

14. The semiconductor package incorporating the micro battery of claim 13, wherein the first active material layer comprises one selected from the group consisting of Li, Graphite LiC, Al, LiAl, Si, LiSi, Sn, and LiSn; andthe second active material layer comprises one selected from the group consisting of LiCoO, LiNiO, LiMnO and a-VO.

15. The semiconductor package incorporating the micro battery of claim 8 wherein the electrolyte layer comprises either LiPON or LiBO.

16. A micro battery comprising: a first current collector having a plurality of through holes;a first active material layer to cover both at least a portion of the first current collector and an inner wall of the through holes;an electrolyte layer on the first active material layer; anda second active material layer on the electrolyte layer.

17. The micro battery of claim 16, wherein the second active material layer fills the through holes.

18. The micro battery of claim 16, wherein the first active material layer covers both opposing sides of the first current collector.

19. The micro battery of claim 16, wherein the first current collector comprises one selected from the group consisting of nickel, aluminum, platinum, copper, and stainless steel.

20. The micro battery of claim 19, wherein the first current collector comprises one selected from the group consisting of the nickel, the aluminum, and the platinum;the first active material layer comprises one selected from the group consisting of LiCoO, LiNiO, LiMnO, and a-VO; andthe second active material layer comprises one selected from the group consisting of Li, Graphite LiC, Al, LiAl, Si, LiSi, Sn, and LiSn.

21. The micro battery of claim 19, wherein the first active material layer comprises one selected from the group consisting of Li, Graphite LiC, Al, LiAl, Si, LiSi, Sn, and LiSn; andthe second active material layer comprises one selected from the group consisting of LiCoO, LiNiO, LiMnO, and a-VO.

22. The micro battery of claim 16, wherein the electrolyte layer comprises either LiPON or LiBO.

23. The micro battery of claim 16, further comprising a second current collector contacting the second active material layer.

24. A micro battery that includes a battery unit comprising: a first current collector extending in a plane in a first direction, electrically connected to one of a positive or negative terminal;through holes disposed in, and substantially perpendicular to, the plane of the first current collector to form inside surfaces thereof, anda battery cell disposed on the first current collector and inside surfaces of the through holes, the battery cell electrically connected between the positive and negative terminals.

25. The micro battery of claim 24, wherein the battery cell comprises: a first active material layer contacting at least a portion of the first current collector and the inside surfaces of the through holes;an electrolyte layer on the first active material layer; anda second active material layer on the electrolyte layer electrically connected to an opposite one of the positive or negative terminals to which the first current collect is connected to.

26. The micro battery of claim 25, further comprising a plurality of battery units arranged in planes parallel to one another, the first current collector of each of the battery units electrically connected to the one of the positive or negative terminal, and the second active material layer electrically connected to the opposite one of the positive or negative terminal.

27. The micro battery of claim 25, further comprising insulating separators disposed between the battery units.

28. The micro battery of claim 24, further comprising a case to enclose the micro battery.

29. The micro battery of claim 24, wherein the through holes are arranged in horizontal and vertical rows.

30. The micro battery of claim 26, wherein a second current collector electrically connected to the second active material layer and the other one of the positive or negative terminal is disposed to cover at least a portion of ends of the battery units and disposed between the battery units.