This application is a continuation of co-pending International Application No. PCT/SG2005/000221, filed Jul. 6, 2005, which designated the United States and was published in English, of which application is incorporated herein by reference.
The present invention relates to integrated circuit (IC) packages and methods for assembling IC packages.
With the miniaturization of electronic devices and, in particular, the widespread popularity of portable electronic devices such as personal data organizers, mobile cellular telephones and portable computers, there is a need to reduce both the footprint and thickness of IC packages.
Traditional IC packages typically comprise an IC mounted onto a lead frame having a plurality of lead fingers for distributing electrical signals to the IC. The IC is electrically connected to inner portions of the lead fingers. An electrically insulating material encapsulates the IC and inner portions of the lead fingers while the outer portions of the lead fingers extend laterally out of the encapsulation material for connection to an external substrate such as a printed circuit board (PCB). However, while these traditional package styles are low cost and simple to manufacture, they also occupy a high footprint.
In order to meet the demand for smaller and slimmer package styles, semiconductor manufacturers have developed “leadless” package styles such as the thin small leadless package (TSLP) and quad flat no-lead package (QFN). In leadless package styles, there are no lead fingers extending laterally out of the encapsulating material. Instead, connection leads which provide the electrical connection between the packaged IC and an external substrate have exposed surfaces located on an exterior surface of the encapsulating material.
a to 1h show a known process for building a conductive pad for an IC package. TSLP frames are typically manufactured in the form of an array comprising a plurality of frames, with the individual units then being separated. Typically, a TSLP frame will include a number of conductive pads but, for simplicity, only a single pad is shown in
Once the TSLP frame has been formed as described with reference to
Then, the die 207 is electrically connected to bond pad 205 (and other bond pads (not shown)) by a wire bond 209. This is shown in
There are a number of disadvantages of the processes described above with reference to
As already discussed, another type of leadless IC package is a QFN.
There are a number of disadvantages of the process described above with reference to
In one aspect, the invention provides an integrated circuit package and a method for manufacturing an integrated circuit package which mitigate or substantially overcome the problems of known arrangements described above.
According to an aspect of the invention, there is provided an integrated circuit package that includes an integrated circuit having a surface at least partially covered by a metal layer and at least one connection point. At least one connector electrically connects the integrated circuit with the at least one connection point. Encapsulating material encapsulates the at least one connector, at least some of the integrated circuit and at least some of the connection point(s), such that a contact surface of each connection point and the metal layer on the integrated circuit are exposed outside the encapsulating material.
Since the integrated circuit itself is at the exterior of the encapsulating material, so that the metal layer is exposed, the IC package can be much thinner than known IC packages.
The metal layer may be coated with a layer of oxidation resistant material. That oxidation resistant material may comprise a noble metal. The noble metal may be silver. Alternatively, the oxidation resistant material may comprise gold or tin or solder. The metal layer itself may comprise nickel and/or gold and/or silver.
The exposed contact surfaces of the at least one connection point may be coated with a layer of oxidation resistant material. That oxidation resistant material may comprise a noble metal. The noble metal may be silver. Alternatively, the oxidation resistant material may comprise gold or tin or solder.
In one embodiment, the at least one connection point comprises a non-layered drop of metal. In that embodiment, preferably the non-layered drop of metal is formed by stud-bumping, i.e., by melting a wire of metal into globules which solidify and form the connection points. Typically, the drops of metal comprise two globular portions, the upper portion being smaller than the lower portion, the lower portion being formed by the metal globule itself and the upper portion being formed by the flattened remnant of the metal wire. In one embodiment, the drops of metal comprise copper.
According to another aspect of the invention, there is also provided a method for manufacturing an integrated circuit package. An adhesive surface is provided and at least one connection point is formed on the adhesive surface. An integrated circuit has a surface at least partially covered by a metal layer. The metal layer on the integrated circuit is attached to the adhesive surface. The integrated circuit is electrically connected to the at least one connection point with at least one connector. Each connector, at least some of the integrated circuit and at least some of the at least one connection point are encapsulated with an encapsulating material. After the encapsulating step, the adhesive surface is removed so as to expose a contact surface of the at least one connection point and the metal layer on the integrated circuit.
Since the integrated circuit itself is attached to the adhesive surface, the resulting IC package can have a reduced height when compared with known IC packages. Obviously, the integrated circuit is attached to the adhesive surface and the connection point(s) are formed on the adhesive surface in such a way that the adhesive surface can be removed.
The adhesive surface may comprise a UV foil surface or a polyimide tape surface. The adhesive surface may be on a substrate arranged to support the at least one connection point and the integrated circuit.
The step of removing the adhesive surface may comprise peeling away the adhesive surface from the encapsulating material. In that case, if the adhesive surface is formed on a substrate, the substrate must be sufficiently flexible to allow it to be stripped or peeled away from the encapsulating material.
The metal layer on the integrated circuit may comprise nickel and/or gold and/or silver.
The method may further comprise, after the step of removing the adhesive surface, the step of coating the exposed metal layer with a layer of oxidation resistant material. The oxidation resistant material may comprise a noble metal, which may be silver.
The method may further comprise, after the step of removing the adhesive surface, the step of coating at least one of the exposed contact surfaces of the at least one connection point with a layer of oxidation resistant material. The oxidation resistant material may comprise a noble metal, which may be silver. Alternatively, the oxidation resistant material may comprise gold or tin or solder.
In one embodiment, the step of forming at least one connection point on the adhesive surface comprises: melting metal wire to form at least one globule; and pressing the at least one globule onto the adhesive surface to form the at least one connection point.
In that arrangement, the process for forming the connection point(s) is known in the art as stud-bumping. The resulting connection points are non-layered drops of metal.
According to an embodiment of the invention, there is also provided an integrated circuit package obtained by the method of the first aspect of the invention.
According to another aspect of the invention, there is provided an integrated circuit package that includes an integrated circuit and at least one connection point. The at least one connection point comprises a non-layered drop of metal. At least one connector electrically connects the integrated circuit with the at least one connection point. Encapsulating material encapsulates the at least one connector, at least some of the integrated circuit and at least some of the at least one connection point, such that a contact surface of the at least one connection point is exposed outside the encapsulating material.
The non-layered drop of metal is preferably formed by a process known in the art as stud-bumping. This comprises melting metal wire into globules which solidify to form the connection points. The solidified globules typically comprise two globular portions, the upper portion being formed from the squashed remains of the metal wire and the lower portion being formed by the globule itself, the upper portion being smaller than the lower portion. In one embodiment the drops of metal comprise copper.
The exposed contact surfaces of the at least one connection point may be coated with a layer of oxidation resistant material. The oxidation resistant material may comprise a noble metal. The noble metal may be silver. Alternatively, the oxidation resistant material may comprise gold or tin or solder.
In one embodiment, the integrated circuit has a surface at least partially covered by a metal layer. The metal layer may comprise nickel and/or silver and/or gold.
In that embodiment, the metal layer on the integrated circuit may be exposed outside the encapsulating material. The metal layer may be coated with a layer of oxidation resistant material. The oxidation resistant material may comprise a noble metal, which may be silver. Alternatively, the oxidation resistant material may comprise gold or tin or solder.
In another embodiment, the integrated circuit is attached to and electrically in contact with an integrated circuit connection point. In that embodiment, a contact surface of the integrated circuit connection point may be exposed outside the encapsulating material. The exposed contact surface of the integrated circuit connection point may be coated with a layer of oxidation resistant material. The oxidation resistant material may comprise a noble metal, which may be silver. Alternatively, the oxidation resistant material may comprise tin or solder or gold.
The integrated circuit connection point may be a non-layered drop of metal. In this case, the connection point is preferably formed by stud-bumping, as previously described.
Alternatively, the integrated circuit connection point may comprise a plurality of metal layers. In this case, the connection point is preferably built up a layer at a time, each layer being formed by plating.
According to another aspect of the invention, there is also provided a method for manufacturing an integrated circuit package. The method includes providing a substrate and melting metal wire to form at least one globule and pressing the at least one globule onto the substrate so that the at least one globule forms at least one connection point. An integrated circuit is electrically connected to the at least one connection point with at least one connector. An encapsulating material encapsulates the at least one connector, at least some of the integrated circuit and at least some of the at least one connection point. After the encapsulating step, the substrate is removed so as to expose a contact surface of the at least one connection point.
The method may further comprise, after the step of removing the substrate, the step of coating at least one of the exposed contact surfaces of the at least one connection point with a layer of oxidation resistant material. The oxidation resistant material may comprise a noble metal, which may be silver. Alternatively, the oxidation resistant material may comprise tin or solder or gold.
In one embodiment, the integrated circuit has a surface at least partially covered by a metal layer. The metal layer may comprise nickel and/or gold and/or silver.
In that embodiment, the method may further comprise, before the encapsulating step, the step of attaching the metal layer on the integrated circuit to the substrate, wherein, after the substrate is removed, the metal layer on the integrated circuit is exposed outside the encapsulating material.
In that case, the substrate preferably has an adhesive surface to which the metal layer on the integrated circuit is attached.
The method may further comprise the step of coating the exposed metal layer with a layer of oxidation resistant material. The oxidation resistant material may comprise a noble metal, which may be silver. Alternatively, the oxidation resistant material may comprise gold or tin or solder.
In an alternative embodiment, the method further comprises the step of forming an integrated circuit connection point on the substrate.
In that embodiment, the method may further comprise the step of attaching and electrically connecting the integrated circuit to the integrated circuit connection point.
In that embodiment, preferably, after the substrate is removed, a contact surface of the integrated circuit connection point is exposed outside the encapsulating material.
The method may further comprise the step of coating the exposed contact surface of the integrated circuit connection point with a layer of oxidation resistant material. The oxidation resistant material may comprise a noble metal, which may be silver. Alternatively, the oxidation resistant material may comprise gold or tin or solder.
The step of forming an integrated circuit connection point on the substrate may comprise: melting metal wire to form at least one globule; and pressing the at least one globule onto the substrate. Alternatively, the step of forming an integrated circuit connection point on the substrate may comprise plating a plurality of metal layers onto the substrate.
According to the invention, there is also provided an integrated circuit package obtained by the method of the second aspect of the invention.
Features described in relation to one aspect of the invention may also be applicable to another aspect of the invention.
For a more complete understanding of the present invention, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:
a to 1h show a known process for manufacturing a conductive pad;
a to 2l show a known process for manufacturing a TSLP package;
a to 3k show a known process for manufacturing a QFN package.
Exemplary embodiments of the invention will now be described with reference to
a and 4b show a process for manufacturing a conductive pad;
a and 5b show two arrangements of bumps formed by the process of
a to 6k show a process for manufacturing a TSLP package according to a first embodiment of the invention;
a to 7j show a process for manufacturing a TSLP package according to a second embodiment of the invention; and
a to 8k show a process for manufacturing a QFN package according to a third embodiment of the invention.
a and 4b show a process for forming a conductive pad, using a copper bumping machine. In this process, a single conductive pad is formed. First of all, a plastic substrate 401 is provided, on which is formed an adhesive layer 403 (for example of UV foil or polyimide tape). This is shown in
The copper bump is produced by a bumping machine which uses copper wire to form globules of liquid copper which are pressed onto the layer 403 as the remainder of the wire is cut. This process is similar to a wire bonding process. The bumping is controlled by the rate of melting of the copper wire and the size of the capillary used for forming globules. Typically, each bump can be formed in about 0.05 s and the bumps can be positioned on the layer 403 to an accuracy of ±3.5 μm. Immediately after the wire is cut, the remnant of the wire remains at the top of the globule of copper so the top surface of the bump is then flattened so that the bump comprises two portions, the upper portion being formed by the remnants of the wire and the lower portion being formed from the metal globule itself. The overall shape resembles the usual shape of a brioche bread loaf. The flattening is commonly incorporated into the step of cutting off the wire. The layer 403 is adhesive so that the bumps will stick to the layer. If taller bumps are required, stacked bumps can be produced by repeating the wire melting and flattening steps a number of times.
The conductive pads described with reference to
If we compare the two step process shown in
The arrangement of bumps can be programmed into the bumping machine. Two different arrangements are shown in
Thus, another advantage of using a bumping machine is that the arrangement of the bumps can easily be changed by reprogramming the machine. In addition, the size of each bump can easily be changed.
a to 6k show a method according to first embodiment of the invention. In this embodiment, copper bumps, as formed by the process of
Because the bumps are made from copper, gold is not necessarily required. Of course, if the bumps were made from gold, no oxidation resistant underside layer would be required at all.
Subsequent steps are the same as in the prior art: lamination (shown in
If we compare the process of
a to 7j show a method according a second embodiment of the invention. In this embodiment, copper bumps as formed by the process of
If we compare the process of
a to 8k show a third embodiment of the invention. This embodiment shows a method for assembling a QFN package. Referring to
If we compare the process of
The arrangements shown in
Several embodiments have been described but other arrangements can be envisaged. For example, in
Number | Date | Country | |
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Parent | PCT/SG2005/000221 | Jul 2005 | US |
Child | 11969739 | Jan 2008 | US |