Patent Application
20120074561
Generally, the present invention relates to the packaging of integrated circuit dice. More specifically, the present invention relates to methods and arrangements for forming exposed die packages.
There are a wide variety of integrated circuit packages. One type of package is an exposed die package. An integrated circuit die is electrically connected to an electronic substrate. Portions of the die and the electronic substrate are encapsulated in a molding compound such that the back surface of the die is exposed on the exterior of the package. The exposure of the back surface of the die facilitates the dissipation of heat out of the package.
For various applications, it is useful to coat the exposed back surface of the die with metal. For example, solder, which is often used to couple an integrated circuit package with a printed circuit board, adheres well to metal but poorly to the silicon surface of a die. Backmetalling the die allows the package to be securely mounted on the printed circuit board. One way of backmetaling the die is to do so at the wafer-level. That is, a metal coating is first applied to the back surface of a semiconductor wafer, which is later singulated to form multiple integrated circuit dice.
Since metal does not easily adhere to the silicon wafer, specialized processes, such as sputtering or evaporation, are generally used to backmetal the wafer. A typical sputtering process involves positioning the wafer and a metal target material in a suitable chamber. Energetic particles are generated from plasma in the chamber and directed towards the target material. The particles erode and physically eject metal atoms from the target material. The high-energy atoms condense to form a metal film that is securely and directly bonded to the wafer.
While the above processes work well, there are continuing efforts to develop improved packaging techniques that provide cost effective approaches for meeting the needs of a variety of different packaging applications.
In one aspect of the present invention, an arrangement for forming exposed die packages will be described. The arrangement includes a semiconductor wafer having multiple integrated circuit dice whose back surfaces cooperate to form the back surface of the wafer. A thermally conductive adhesive layer is deposited on the back surface of the wafer. A thin metal foil is attached to the wafer with the adhesive layer. In some embodiments, the adhesive layer includes metal particles and is both electrically and thermally conductive.
In another aspect of the present invention, a method for forming exposed die packages will be described. A thermally conductive adhesive layer is deposited onto a back surface of an integrated circuit wafer. A metallic foil is attached to the back surface of the wafer using the adhesive layer. In various embodiments, the wafer may be singulated to form multiple integrated circuit dice. In still other embodiments, one of the dice is electrically connected to a lead frame. Portions of the lead frame and the die are encapsulated in a molding material such that the thin foil on the back surface of the die remains exposed.
The invention and the advantages thereof, may best be understood by reference to the following description taken in conjunction with the accompanying drawings in which:
In the drawings, like reference numerals are sometimes used to designate like structural elements. It should also be appreciated that the depictions in the figures are diagrammatic and not to scale.
The present invention relates generally to the packaging of integrated circuits. More specifically, the present invention relates to a process for applying a thin metal foil onto a semiconductor wafer. As explained in the background section, the conventional wisdom in the packaging industry is to use vaporization or sputtering to apply a metal layer directly onto a semiconductor wafer. This approach, while useful in many applications, can have disadvantages. For one, vaporization and sputtering techniques can require the use of expensive equipment. The processes themselves can also be relatively time-consuming. Additionally, existing sputtering equipment is generally not well suited for use with extremely thin wafers (e.g., wafers with a thickness of less than 5 mils.) When extremely thin wafers are not properly supported by the sputtering equipment, they tend to lose their flatness, which may cause the metal layer to accumulate unevenly on the surface of the wafer during the sputtering process or damage the wafer during processing.
Various embodiments of the present invention address one or more of the above concerns. One embodiment of the present invention is illustrated in
The above implementation can have several advantages. For one, attaching a foil to a wafer in the described manner may be faster and more affordable than a corresponding sputtering process. A wide variety of techniques may be used to bond the foil 110, wafer 106 and adhesive layer 108 together. By way of example, lamination works well for various applications. Some of these bonding operations, such as lamination, are also compatible with the use of extremely thin wafers (e.g., wafers with a thickness of less than 5 or 6 mils.) The use of a thinner wafer can reduce the size and footprint of integrated circuit packages that are formed from the wafer.
It should be appreciated that the described implementation is believed to be a significant advance over existing backmetal processes. To the best knowledge of the inventors, existing backmetal processes do not involve attaching a metal foil 110 to a semiconductor wafer 106 with an adhesive layer 108 in the manner illustrated in
Returning now to
The thermally conductive adhesive layer 108 is arranged to form a strong bond between the metal foil 110 and the semiconductor wafer 106. The bond formed by the adhesive layer 108 is arranged to tolerate temperature extremes and other stresses produced by various stages of the packaging process. In various embodiments, the adhesive layer 108 has a thermal conductivity that is approximately equal to or greater than a thermal conductivity of solder. For example, some implementations involve an adhesive layer 108 that has a thermal conductivity in excess of approximately 25, 50 or 60 W/(m·K). The adhesive layer 108 can be made from a wide variety of suitable materials, including epoxy. In some embodiments, the adhesive layer 108 is also electrically conductive and may be filled with metal particles. By way of example, a B staged nanosilver paste or an epoxy filled with silver particles work well for various applications, although other suitable adhesives may also be used.
Referring next to
The foil 110 may be made of any suitable, thermally conductive material. By way of example, copper works well as a material for the foil 110. The metal foil can be a foil, mesh, or metal cloth with high weaves. The thickness of the foil 110 may vary considerably. In some embodiments, the foil 110 has a thickness that is less than approximately 35 microns. In still other embodiments, the foil has a thickness between approximately 15 to 35 microns, although thicker and thinner foils may also be used in various applications. In some implementations, the thickness of the foil 110 is uniform across the entire back surface of the semiconductor wafer.
Various processes may be used to bond the foil 110, adhesive layer 108 and wafer 106 together. For example, in some embodiments the various layers are laminated together. In still other embodiments, the adhesive layer 108 is cured after the foil 110 has been applied over the semiconductor wafer. Various approaches involve attaching the foil 110, adhesive layer 108 and wafer 106 with one another to form the bonded arrangement 100 illustrated in
Afterward, the bonded arrangement is singulated along projected saw streets 102, as indicated in step 206 and
Some implementations involve at least two distinct cutting operations. By cutting through the semiconductor wafer and the foil in separate stages, the smoothness of the cuts may be improved and/or wear and tear on the sawing blades may be reduced. For example, some approaches involve a first set of one or more cutting operations and a second set of one or more cutting operations. In the first set of cutting operations, the cuts penetrate (entirely) through the semiconductor wafer 106 without cutting the foil 110. An example of such cutting operations is illustrated in
Afterward, the singulated dice 104 are attached to and electrically connected with a lead frame 301, which may be formed from any suitable electrically conductive material (step 208 and
Each device area 305 may include a number of leads 311, each supported at one end by the tie bars 307. In the illustrated embodiment, the leads 311 include conductive die contacts 315 on the top surface of the lead frame at the proximal end of the lead. The leads 311 additionally include package contacts on the bottom surface of the lead frame at the distal ends of the leads. The leads 311 may be etched, half-etched, or otherwise thinned relative to the package contacts, so as to provide electrical connection to the contacts without leaving exposed conductive areas on the bottom surface of the lead frame panel 301. Additionally, it may also be desirable to etch or otherwise thin the top surface of the lead frame as well.
It will be appreciated by those skilled in the art that, although a specific lead-frame panel 301 has been described and illustrated, the described methods may be applied in packaging dice utilizing an extremely wide variety of other lead frame panel or strip configurations as well as other substrates. Thus, although the following description of particular embodiments describes the packaging of dice utilizing lead frame technology, those of skill in the art will understand that embodiments of the present invention may also be practiced using other substrates. Additionally, although described with references to a top and bottom surface of the lead frame panel 301, it should be appreciated that this context is intended solely for use in describing the structure and in no way defines or limits the orientation of the lead frame for subsequent attachment to a PCB or other substrate.
The dice 104 may be electrically connected to the lead frame 301 in any suitable manner, depending on the needs of a particular application art e.g., flip chip configuration, wirebonding, etc. By way of example, dice 104 of
The dice 104 may be electrically coupled to the lead frame 301 in ways that differ from what is illustrated in
At step 210 and
It should additionally be appreciated that virtually any molding system may be used to encapsulate the attached dice 104 and lead frame panel 301. By way of example, a film assisted molding (FAM) system may be used to encapsulate the attached dice 104. In such a system, a vacuum is used to draw a film or tape to the inner surfaces of the molding cavity. By way of example, the film used within the mold cavity may be a thermoplastic adhesive film. In this way, portions of the lead frame panel and dice 104 that would make contact with the mold cavity during encapsulation instead make contact with the adhesive film. Thus, in one embodiment, during encapsulation, the surface of the metal foil 110 opposite the back surface of each die 104 is in contact with the adhesive film, which is turn in contact with the mold cavity. The adhesive film generally aids in reducing mold compound intrusion over the back surfaces of the dice 104.
However, FAM systems are not always available or applicable to particular lead frame configurations. Hence, one approach involves initially positioning the populated lead frame 301 in a molding cavity. The lead frame 301 and dice 104 are positioned within the mold cavity such that the metal foil 110 on the bottom surface of each die is pressed flush against the mold cavity. Afterward, the molding compound 319 is injected into the mold cavity. The pressing together of the dice 104 and the mold cavity helps prevent molding compound 319 from covering the metal foil 110. In various embodiments, the mold cavity may or may not be covered with an adhesive film. In the former case, the metal foil 110 on the bottom surface of each die 104 is instead pressed flush against the film overlying the mold cavity, rather than against the mold cavity itself.
After the encapsulation process (step 210), the encapsulated lead frame panel 308 may then be singulated (step 212) to yield a plurality of individual IC packages having exposed metal foils on the back surfaces of the packaged dice. Examples of such packages include those illustrated in
Various examples of individual integrated circuit packages are illustrated in
Although only a few embodiments of the invention have been described in detail, it should be appreciated that the invention may be implemented in many other forms without departing from the spirit or scope of the invention. In the foregoing description, the figures may be understood as showing additional features that are not specifically pointed out in the written specification. For example, based on a review of
