Patent Application
20130069218
1. Technical Field
The present disclosure generally relates to cooling integrated circuits.
2. Description of the Related Art
Semiconductor circuits that are subjected to undesirable quantities of heat may operate differently than designed, may malfunction, or may fail. The heat may be generated through power dissipation that occurs during the operation of a semiconductor circuit. As a result, the dissipation and distribution of heat from a semiconductor die can be of great interest to a manufacturer.
Some existing approaches to transferring heat from a semiconductor die include enclosing the semiconductor die in a package. The existing approaches to semiconductor die packaging are, however, limited by the electrical interface between the semiconductor die and the external electrical interface of the package, such as solder balls. For example, as illustrated by U.S. Patent Application Publication No. 2006/0030150, after placing a semiconductor die in a recess of a substrate existing approaches to packaging require forming direct electrical connections to bonding pads on an upper exposed surface of the die. The direct electrical connections to the upper exposed surface of the die require multiple process steps, such as depositing a dielectric layer, selectively etching the dielectric layer, and depositing a conductive layer within portions of the dielectric layer that have been selectively etched away.
Several other popular methods of channeling heat at the package level exist, but many of them consume power in the process. Examples include thermoelectric cooling, integrated micro pumps inside the silicon substrate below the high power region of integrated circuits, and fluid-based cooling of hot regions of integrated circuits.
The passive thermal energy transfer techniques of the herein disclosed embodiments of the invention utilize integrated circuit packages to improve heat sink-based cooling from a semiconductor die.
According to one embodiment of the invention, a flexible substrate is pressed into a recess of a highly thermally conductive heat sink. The flexible substrate carries traces from a surface within the recess to a surface that is outside of the recess. The use of various configurations of semiconductor dies within the recess is disclosed herein. For example, because an upper surface of a semiconductor die need not be exposed for the disclosed packaging technique, electrically coupling the semiconductor die to the flexible substrate may be performed by either wire bonding or by the use of conductive bumps. Additionally, the flexible substrate provides electrical isolation between the semiconductor die and the high K heat sink, which may be formed from metal such as copper, aluminum, or the like.
According to another embodiment of the invention, the disclosed packaging technique is compatible with various multi-package configurations. For example, the disclosed packaging technique may be used with system-in-a-package (SiP), package-on-package (PoP), and package-in-package (PiP) packaging techniques.
In the drawings, identical reference numbers identify similar elements or acts. The sizes and relative positions of elements in the drawings are not necessarily drawn to scale. For example, the shapes of various elements and angles, and some of the elements are enlarged and positioned to improve understanding of the inventive features
In the description provided herewith, certain specific details are set forth in order to provide a thorough understanding of various disclosed embodiments. However, one skilled in the relevant art will recognize that embodiments may be practiced without one or more of these specific details, or with other methods, components, etc. In some instances, well-known structures or processes associated with fabrication of MEMS have not been shown or described in detail to avoid unnecessarily obscuring descriptions of the inventive embodiments.
Unless the context requires otherwise, throughout the specification and claims that follow, the words “comprise” and “include” and variations thereof, such as “comprises,” “comprising,” and “including,” are to be construed in an open, inclusive sense, that is, as meaning “including, but not limited to.”
Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” include plural referents unless the content clearly dictates otherwise. It should also be noted that the term “or” is generally employed in its sense including “and/or” unless the content clearly dictates otherwise.
As used in the specification and appended claims, the use of “correspond,” “corresponds,” and “corresponding” is intended to describe a ratio of or a similarity between referenced objects. The use of “correspond” or one of its forms should not be construed to mean the exact shape or size.
The heat sink 52 is formed from a material having a high K value (thermal conductivity). High K values for thermally conductive material generally refer to materials having a K value of at least 10 W/(m·K), and more preferably having a k-value of at least 100 W/(m·K). For example, many plastic molding compounds are generally composite materials consisting of epoxy resins, phenolic hardeners, silicas, and mold release agents, which may combine to have a K value of 1.1-1.3 W/(m·K). By contrast many metals have a significantly higher K value than plastic molding. Specifically, pure aluminum has a K value between 204-249 W/(m·K), pure copper has a K value between 350-400, and pure silver has a K value between 406-430. According to one embodiment, the heat sink 52 is made of metal, preferably copper.
The recess 56 is shaped or formed into the heat sink 52, according to one embodiment. The heat sink 52 may be formed from sheet metal or otherwise from a block of metal. In one embodiment, portions of the heat sink 52 are milled away to form the floor 58 and the raised step 60 of the recess 56. According to one embodiment, the sidewalls of the recess 56 that surround the floor 58 and the raised step 60 are substantially perpendicular to the floor 58. In one embodiment, the recess 56 is stamped into a metal sheet to form the heat sink 52.
The heat sink 52 is molded to have the recess 56, according to another embodiment. A metal, such as copper, is heated to a liquid phase and poured into mold having a contour that is a negative of the floor 58 and the raised step 60 of the recess 56. Upon cooling, the heat sink 52 is removed from the mold for use in the additional manufacturing process steps described herein.
The upper peddle tool 73 presses the flexible substrate 70 onto the adhesive 66 that has been applied over portions of the heat sink 52. The flexible substrate 70 electrically isolates the metal heat sink 52 from a semiconductor die that will be positioned into the recess 56 during a subsequent process step. The electrical isolation provided by the flexible substrate 70 between the heat sink 52 and the semiconductor die advantageously enables the use of metals and other high K materials for the heat sink 52 that would otherwise interfere with and potentially short-circuit portions of the semiconductor die. The flexible substrate 70 is made from a flexible dielectric. According to one embodiment, the flexible substrate 70 includes one or more layers of polyimide. Many other types of flexible conductors are known in the art, all of which would be considered usable as equivalents here. The flexible substrate carries a plurality of electrically conductive traces (shown in
According to one embodiment, a flexible substrate 70 is cured into the recess 56 for some predetermined duration of time. After pressing the flexible substrate 70 into the recess 56, the IC package 50 is placed within an environment having a temperature in the range of 150° C. to 250° C. for at least 30 min. More preferably, the IC package is placed within the environment having a temperature in the range of 150° C. to 250° C. for at least two hours to cure the flexible substrate 70 into the recess 56. According to another embodiment, the IC package 50 is placed into an environment having a temperature in the range of 150° C. to 250° C. for at least 30 minutes and less than one hour after pressing the flexible substrate 70 into the recess 56.
The use of the flexible substrate 70 to route signals from to and from a semiconductor die positioned in the recess 56 has several advantages over the existing techniques used for packaging semiconductor dies. For example, as will be shown below, a semiconductor die positioned within the recess 56 may be physically and electrically coupled to the flexible substrate 70 using conductive bumps that are located on one side of the semiconductor die or the semiconductor die may physically and electrically coupled to the flexible substrate 70 via wire bonds. The flexible substrate 70 also enables communicative access to the semiconductor die without forming perforations through the heat sink 52 and without needing to expose an upper surface of the semiconductor die in order to form electrical connections to bonding pads of the die by forming openings in a masking layer and depositing metal therein. Advantageously, by relying on traces carried by the flexible substrate 70 rather than forming electrical connections to the semiconductor die through perforations in the heat sink 52, the heat sink 52 may be formed from a high K value material, such as metal, without grounding or substantially interfering with the electrical connections made to the semiconductor die.
The sets of traces 81 that are carried by the flexible substrate 74 are low-resistance electrical conductors made from metal. The traces 81 are attached to the flexible substrate 74 prior to conforming the flexible substrate 74 into the recesses 77. The traces 81 are attached to the surface of the flexible substrate 74 with an adhesive. According to one embodiment, the flexible substrate 74 comprises multiple layers of material, and the traces 81 are bonded to the flexible substrate 74 prior to the addition of a last layer so that a portion of the last layer of the flexible substrate 74 is removed to expose the traces 81. According to another embodiment, metal is liquefied and poured into small openings or molds in the flexible substrate 74 to form the sets of traces 81. The traces 81 are made thin enough to flexibly conform to the recesses 77 while the flexible substrate 74 is pressed into the recesses 77, and the traces are thick enough to withstand the friction applied to the surface of the traces 81 while the flexible substrate 74 is pressed into the plurality of recesses 77. According to one embodiment, the thickness of the traces 81 is greater than or equal to approximately 20 μm and less than or equal to approximately 200 μm.
Although not illustrated, each of the sets of traces 81a-c will be offset from the center of each of the respective recesses 77a-c so that each of the traces 81a-c will a line with their respective recesses 77a-c as one or more portions of the flexible substrate 74 is pressed into one or more of the recesses 77.
In a later manufacturing process step, each of the IC packages 78a-c of the one dimensional array of IC pages 75 may be singulated by one of several techniques that will be discussed below.
To facilitate understanding of the embodiment illustrated in
Adhesive 86 physically couples the semiconductor die 88 to the flexible substrate 70, according to one embodiment of the invention. The adhesive 86 is a die paste that is applied to the bottom of the semiconductor die 88 prior to positioning the semiconductor die 88 into the recess 56. The adhesive 86 secures the semiconductor die 88 in place during the subsequent wire-bonding and mold encapsulation process steps. Alternatively, the adhesive 86 is sprayed or squirted into the bottom of the recess 56 prior to positioning semiconductor die 88 into the recess 56.
Wire bonds 90 electrically couple or connect the semiconductor die 88 to the flexible substrate 70, according to one embodiment of the invention. Wire bonds 90 are attached to bonding pads located on the semiconductor die 88 and are arcuately attached to corresponding pads of the conductive traces that are attached to the flexible substrate 70. Wire-bonding is the most traditional and cheapest technology used for forming electrical connections to a semiconductor die. According to one embodiment, the wire diameter of the wire bonds 90 is greater than or equal to 15 μm and less than or equal to 50 μm. The wire bonds 90 are formed from gold, aluminum, or copper, according to various embodiments of the invention.
The mold encapsulant 98 is an electrical insulator that electrically isolates the bonding wires 90 from each other, according to one embodiment. The mold encapsulant 98 consists of plastic or epoxy. The mold encapsulant 98 is heated to a liquid state and is injected into the recess 56 of the IC package 50. After cooling, the mold encapsulant 98 is chemically or mechanically planed to a flat surface, according to one embodiment.
Solder balls 100 are attached to the second trace pads 94b after the application of the mold encapsulant 98. The solder balls 100 are fully spherical or are solder bumps that are not fully spherical. The solder balls 100 are made from tin, tin-zinc, tin-copper, tin-bismuth, tin-silver, tin-indium, or the like. The solder balls 100 are heated and used to electrically and mechanically couple the IC package 50 to a circuit board, another IC package, a flip chip, other electronics interface.
The heat spreader or heat sink 104 is formed from a sheet or block of metal having a high K value. As discussed above in connection with other embodiments, a high K value is a thermal conductivity that is at least 10 W/(m·K). More preferably, the high K value is a thermal conductivity that is at least 100 W/(m·K). Accordingly, the heat sink 104 may be formed from a sheet or block of copper, aluminum, brass, or other metal.
A recess 114 is formed or machined into the heat sink 104 to receive the semiconductor die 110. As discussed above, according to another embodiment, liquid metal is poured into a mold to form the recess 114 and heat sink 104 into the particular shape illustrated in
A flexible substrate 108 is conformally positioned over the heat sink 104 and into the recess 114. The flexible substrate 108 is pressed into the recess 114 using a tool that is shaped to fit inside the recess 114 to apply pressure to the flexible substrate 108, causing the flexible substrate 108 to conform to the shape of the recess 114. Additionally, the flexible substrate 108 is heated to facilitate the manufacturing process step of conformally pressing the flexible substrate 108 into the recess 114, according to one embodiment. The flexible substrate 108 is adhered to the heat sink 104 using an adhesive 106. The flexible substrate 108 electrically separates the semiconductor die 110 from the heat sink 104 while permitting heat generated from the semiconductor die 110 to pass to the heat sink 104 through thermal conduction so the heat sink 104 may further transfer the heat via radiation to other thermal systems. The flexible substrate 108 is formed from polyimide, according to one embodiment of the invention.
Various electrical components may be attached to the flexible substrate 108 inside the recess 114. For example, the flip-chip semiconductor die 110 having a ball grid array (BGA) 112 is connected to traces carried by the flexible substrate 108. In place of bonding wires, the BGA 112 provides both electrical and mechanical coupling or connection to the flexible substrate 108. The BGA 112 are bumps of solder, gold, or copper, according to various embodiments of the invention. Advantageously, a small bump of metal is smaller and shorter than a long wire and therefore can conduct a signal much faster and at a higher bandwidth than a bond wire. Passive components 111, such as capacitors, are also connected to traces carried by the flexible substrate 108 to condition the signals passing through the traces, according to one embodiment.
A layer of thermal fill 113 is deposited over the floor region 115 of the flexible substrate 108 to fill the spaces between the bottom surface of the semiconductor die 110, the BGA 112, and the flexible substrate 108. The layer of thermal fill 113 is deposited prior to filling the recess 114 with a mold encapsulant 118. Transferring heat via radiation through air is less thermally-efficient than transferring heat via conduction. Therefore, depositing a thermal fill 113 between the bottom surface of the semiconductor die 110, the BGA 112, and the flexible substrate 108 facilitates the conductive transfer of heat from the semiconductor die 110 to the heat sink 104 whereby the heat is radiated and/or further conducted to additional heat sinks.
A mold encapsulant 118 is injected or deposited to fill the recess 114. The mold encapsulant 118 secures in place the flip-chip semiconductor die 110 and the plurality of passive components 111.
Solder balls 120 are deposited on trace pads located above an upper surface 117 of the heat sink 104. The solder balls 120 enable the IC package 102 to be both electrically and mechanically coupled to other IC packages, circuit boards, or other electronic devices.
As described above, the first IC package 140 includes a flexible substrate 126 conformally adhered to a heat sink 122, and a semiconductor die 128 positioned within a recess 130 that has been formed or shaped into the heat sink 122, according to one embodiment. The semiconductor die 128 is electrically and mechanically coupled or connected to traces carried on the flexible substrate 126 with a BGA 136. Alternatively, the semiconductor die 128 is electrically and mechanically coupled or connected to traces carried on the flexible substrate 126 with bonding wires. A mold encapsulant 132 is deposited over the semiconductor die 128 to fill the recess 130 and enclose the semiconductor die 128.
A saw blade 146 singulates the array of IC packages 128 into individual IC packages 140, 142, and 144, according to one embodiment. At thousands of revolutions per minute, the saw blade 146 cuts between solder balls 138 of each of the IC packages 140, 142, and 144. According to another embodiment, a laser is used to cut between IC packages 140, 142, and 144.
The IC package 244 also includes a flexible substrate 258 that is configured to conform around a plurality of external surfaces of the heat sink 250. The flexible substrate 258 includes a plurality of traces (as shown in
The semiconductor dies 260a and 260b are devices that function in conjunction with the semiconductor die 246 to perform a specific function, according to one embodiment. For example, the semiconductor die 246 may include a controller integrated circuit for a DC-DC buck converter, and each of the semiconductor dies 260a and 260b are phase controlling devices that work in a master-slave relationship with the semiconductor die 246. As another example, the semiconductor die 246 may be a processor, semiconductor dies 260a and 260b are memory devices, and the semiconductor die 246 is configured to store and retrieve information from memory devices.
According to one embodiment, the semiconductor die 246 includes a plurality of smaller semiconductor dies in a package-in-package configuration. According to another embodiment, the semiconductor die 246 includes a plurality of diverse components in a system-in-a-package configuration.
In the PoP IC package 264, the IC package 266 is electrically and physically coupled to the IC package 244, according to one embodiment of the invention. The solder balls 278 of the IC package 266 are adhered to traces carried by the flexible substrate 258 of the IC package 244. The solder balls 278 are heated to liquefy the solder balls 278 so that they adhere to traces carried by the conformal layer 258. Through the electrical and physical connection of the solder balls 278 to the traces carried by the flexible substrate 258, the semiconductor die 268 is communicatively coupled to the semiconductor die 246 and/or to the solder balls 254. According to one embodiment, additional IC packages similar to IC package 244 and IC package 266 may also be electrically and physically coupled to the PoP IC package 264.
According to one embodiment the semiconductor die 246 and the semiconductor die 268 perform similar functions, that is, they are similar devices. According to another embodiment, the semiconductor die 246 and semiconductor die 268 are different types of devices and perform functions that support the operation of each other.
According to another embodiment, a gap 284 that is between the IC package 244 and IC package 266 may be filled with a high K dielectric that thermally couples the IC packages together to improve the ability of the stacked IC package 264 to dissipate heat from each of the semiconductor dies to 246 and 268.
As illustrated, the IC packages 244 and 266 include wire-bonded semiconductor dies 246 and 268 positioned within single step recesses 248 and 270, respectively. According to other embodiments, one or more of the IC packages that constitute the PoP IC package 264 are flip-chip semiconductor dies positioned within single step or multi-step recesses within IC packages.
The PoP IC package 288 includes a flip-chip semiconductor die 306 that is electrically and mechanically coupled to the conformal layer 296 via a plurality of solder balls 308. The electrical connection of the semiconductor die 306 to the conformal layer 296 via the solder balls 308 communicatively couples the semiconductor die 306 to the semiconductor die 290, according to one embodiment. Both the semiconductor die 290 and the semiconductor die 306 are electrically connected to a plurality of solder balls 310 that are electrically and physically coupled to traces (as shown in
The above description of illustrated embodiments, including what is described in the Abstract, is not intended to be exhaustive or to limit the embodiments to the precise forms disclosed. Although specific embodiments and examples are described herein for illustrative purposes, various equivalent modifications can be made without departing from the spirit and scope of the disclosure, as will be recognized by those skilled in the relevant art.
These and other changes can be made to the embodiments in light of the above-detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims, but should be construed to include all possible embodiments along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the disclosure.
The various embodiments described above can be combined to provide further embodiments. All of the U.S. patents, U.S. patent application publications, U.S. patent applications, foreign patents, foreign patent applications and non-patent publications referred to in this specification and/or listed in the Application Data Sheet are incorporated herein by reference, in their entirety. Aspects of the embodiments can be modified, if necessary to employ concepts of the various patents, applications and publications to provide yet further embodiments.
