Claims
- 1. An integrated circuit, comprising:
- (a) at least one transistor formed at a frontside surface of a substrate;
- (b) at least one transmission line at said frontside surface;
- (c) an airbridge formed over portions of said at least one transistor wherein a top surface of said airbridge is spaced from said frontside surface by a distance approximately equal to, or greater than, the thickness of said substrate;
- (d) a heatsink coupled to said airbridge; and
- (e) a conducting via through said substrate coupling said at least one transistor to a bond pad at a backside surface.
- 2. The circuit of claim 1, further comprising a groundplane at said backside surface of said substrate.
- 3. The circuit of claim 1, wherein said heatsink comprises a dielectric.
- 4. The circuit of claim 3, wherein said dielectric is taken from a group consisting of AIN and BeO.
- 5. The circuit of claim 1, wherein said heatsink is metal.
- 6. The circuit of claim 5, wherein said metal is plated with gold.
- 7. The circuit of claim 6, wherein said metal is copper.
- 8. The circuit of claim 1, wherein said bondpad at said backside surface of said substrate is a conductive element in a coplanar waveguide.
- 9. The circuit of claim 3, wherein said dielectric heatsink is coupled to a metal heatsink.
- 10. An integrated circuit, comprising:
- (a) at least one transistor formed at a frontside surface of a substrate;
- (b) at least one transmission line at said frontside surface;
- (c) an airbridge formed over portions of said at least one transistor wherein a top surface of said airbridge is spaced from said frontside surface by a distance approximately equal to, or greater than, the thickness of said substrate;
- (d) dielectric covering said at least one transmission line such that a surface of said dielectric is substantially planar with said top surface of said airbridge;
- (e) a heatsink coupled to said airbridge; and
- (f) a conducting via through said substrate coupling said at least one transistor to a bond pad at said backside surface.
- 11. The circuit of claim 10, wherein said dielectric is polyimide.
- 12. The circuit of claim 10, wherein said heatsink is a dielectric.
- 13. The circuit of claim 12, wherein said dielectric is taken from a group consisting of AIN and BeO.
RELATED APPLICATIONS
This is a continuation-in-part of copending U.S. application Ser. No. 08/298,822 filed Aug. 31, 1994 by Hua-Quen Tserng and Paul Saunier for an invention entitled "Integrated Circuit with Improved Thermal Impedance." This application includes subject matter which is related to U.S. patent application Ser. No. 08/159,648, "Low Thermal Impedance Integrated Circuit," (Texas Instruments, Inc., Docket No. TI-18439), filed Nov. 30, 1993.
US Referenced Citations (3)
Non-Patent Literature Citations (1)
Entry |
W. S. Wong, W. D. Gray, and D. C. Wang, "Flip Chip Manufacturing Technology for GaAs MMIC," Hughes Aircraft Company, Microelectronic Circuits Division, 1993 GaAs Mantech, Conf. |
Continuation in Parts (1)
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Number |
Date |
Country |
Parent |
298822 |
Aug 1994 |
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