SEMICONDUCTOR DEVICE

Abstract

One of the aspects of the present invention is to provide a semiconductor device, which includes a base plate, an insulating substrate on the base plate, and a wiring patterned layer on the insulating substrate. Also, it includes at least one semiconductor chip bonded on the wiring patterned layer, the semiconductor chip having a surface electrode. A main terminal is connected via a conductive adhesive layer onto at least either one of the surface electrode and the wiring patterned layer. Also, a resin package covers the insulating substrate, the wiring patterned layer, the semiconductor chip, the conductive adhesive layer, and at least a portion of the main terminal.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will more fully be understood from the detailed description given hereinafter and accompanying drawings which are given by way of illustration only, and thus are not limitative of the present invention.

FIG. 1 is a perspective view of the first embodiment of the semiconductor device according to the present invention.

FIG. 2 is an internal perspective view of the semiconductor device of FIG. 1 with a resin package eliminated.

FIG. 3 is a cross sectional view taken along a III-III line of FIG. 1.

FIG. 4 is a perspective view of a modified L-shaped main terminal.

FIG. 5 is a perspective view of the second embodiment of the semiconductor device according to the present invention.

FIG. 6 is an internal perspective view of the semiconductor device of FIG. 5 with a resin package eliminated.

FIG. 7 is a cross sectional view taken along a VII-VII line of FIG. 5.

FIG. 8 is a cross sectional view of an unfinished semiconductor device provided between upper and lower dice.

FIG. 9 is a perspective view of the third embodiment of the semiconductor device according to the present invention.

FIG. 10 is an internal perspective view of the semiconductor device of FIG. 9 with a resin package eliminated.

FIG. 11 is a top plan view of the semiconductor device of FIG. 9 with a resin package eliminated.

FIG. 12 is a cross sectional view taken along a XII-XII line of FIG. 9.

FIG. 13 is a perspective view of the fourth embodiment of the semiconductor device according to the present invention.

FIG. 14 is a top plan view of the semiconductor device of FIG. 13 with a resin package eliminated.

FIG. 15A is an internal circuit diagram of the semiconductor device, and FIGS. 15B and 15C are exemplary external wiring diagrams for connection terminals.

Claims

1. A semiconductor device, comprising: a base plate;an insulating substrate on said base plate;a wiring patterned layer on said insulating substrate;at least one semiconductor chip bonded on said wiring patterned layer, said semiconductor chip having a surface electrode;a main terminal connected via a conductive adhesive layer onto at least either one of the surface electrode and said wiring patterned layer;a resin package covering said insulating substrate, said wiring patterned layer, said semiconductor chip, the conductive adhesive layer, and at least a portion of said main terminal.

2. The semiconductor device according to claim 1, wherein said main terminal includes a connection portion opposing to the conductive adhesive layer and a plate-like extension portion in a direction perpendicular to the conductive adhesive layer, andwherein said resin package covers the connection portion while exposing at least a portion of the extension portion.

3. The semiconductor device according to claim 2, wherein said main terminal has an L-shaped conductive member.

4. The semiconductor device according to claim 1, wherein said main terminal has an internally threaded hole that is exposed by said resin package.

5. The semiconductor device according to claim 4, wherein said main terminal has a conductive nut.

6. A semiconductor device, comprising: a base plate;an insulating substrate on said base plate;a wiring patterned layer on said insulating substrate;at least two semiconductor chips bonded on said wiring patterned layer, each of said semiconductor chips having surface electrode;a lead plate connected onto each of the surface electrodes of said semiconductor chips;an inter-chip terminal connected via a conductive adhesive layer onto said lead plate;a resin package covering said insulating substrate, said wiring patterned layer, said semiconductor chips, the conductive adhesive layer, and at least a portion of said inter-chip terminal.

7. The semiconductor device according to claim 6, wherein said inter-chip terminal has an internally threaded hole, which is exposed by said resin package.

8. The semiconductor device according to claim 6, wherein said semiconductor chips include a pair of an transistor chip and a diode chip which are reversely connected in parallel, the transistor chip having a control electrode,wherein a control terminal is connected on the control electrode of the transistor chip, extending in a direction perpendicular to the control electrode, andwherein said resin package exposes a portion of said control terminal.

9. The semiconductor device according to claim 6, further comprising a plurality of main terminals, each of which is connected onto said wiring patterned layer; and wherein said semiconductor chips include a plurality of pairs of transistor chips and diode chips, each pair of which are reversely connected in parallel, each of the transistor chips having a control electrode, andwherein a plurality of control terminals are connected with the control electrodes of the transistor chips, extending in a direction perpendicular to the control electrodes, andwherein said resin package exposes a portion of each of said control terminals.

10. The semiconductor device according to claim 9, wherein each of said main terminals, said inter-chip terminals, and said control terminals include the portions exposed by said resin package, andwherein one of said main terminals, said inter-chip terminals, and said control terminals is symmetrically arranged to another one in relative to a center line, respectively.

11. The semiconductor device according to claim 1, wherein said resin package is formed of thermoplastic resin.

12. The semiconductor device according to claim 6, wherein said resin package is formed of thermoplastic resin.