The present invention relates in general to integrated circuit packaging, and in particular to an improved ball grid array package with enhanced thermal characteristics and a unique method of manufacturing the ball grid array package.
High performance integrated circuit (IC) packages are well known in the art. Improvements in IC packages are driven by industry demands for increased thermal and electrical performance and decreased size and cost of manufacture.
In general, array packaging such as Plastic Ball Grid Array (PBGA) packages provide a high density of interconnects relative to the surface area of the package. However, typical PBGA packages include a convoluted signal path, giving rise to high impedance and an inefficient thermal path which results in low thermal dissipation performance. With increasing package density, the spreading of heat generated by the package is increasingly important.
Reference is made to
Variations to conventional BGA packages have been proposed for the purpose of increasing thermal and electrical performance. One particular variation includes the addition of a metal heat spreader to the package, as shown in
It is therefore an object of an aspect of the present invention to provide a process for manufacturing a BGA package with a heat spreader that obviates or mitigates at least some of the disadvantages of the prior art.
In one aspect, a ball grid array integrated circuit package is manufactured by mounting a semiconductor die, to a first surface of a substrate such that bumps on the semiconductor die are electrically connected to conductive traces of the substrate. At least one collapsible spacer is mounted to at least one of a heat spreader, the semiconductor die and the substrate. The heat spreader is fixed to the at least one of the first surface of the substrate and the semiconductor die such that the at least one collapsible spacer is disposed therebetween. A ball grid array is formed on a second surface of the substrate, bumps of the ball grid array being electrically connected to the conductive traces and the integrated circuit package is singulated.
In another aspect, a ball grid array integrated circuit package is manufactured by mounting a semiconductor die, to a first surface of a substrate such that bumps on the semiconductor die are electrically connected to conductive traces of the substrate. At least one collapsible spacer is mounted to at least one of a heat spreader, the semiconductor die and the substrate. One of the heat spreader and the substrate is placed in a mold cavity and; the other of the heat spreader and the substrate is releasably clamped to a die of the mold cavity, such that the collapsible spacer is disposed between the heat spreader and the substrate. A molding compound is molded in the mold, thereby molding the semiconductor die, the substrate, the at least one collapsible spacer and the heat spreader into the molding compound to provide a molded package. A ball grid array is formed on a second surface of the substrate, bumps of the ball grid array being electrically connected to the conductive traces and the integrated circuit package is singulated.
In another aspect, there is provided a process for manufacturing a plurality of integrated circuit packages. The process includes mounting a plurality of semiconductor dice to a first surface of a substrate array such that bumps on the semiconductor dice are electrically connected to conductive traces of the substrate. A collapsible spacer array is mounted to one of a heat spreader array and the substrate array. One of the heat spreader array and the substrate array is placed in a mold cavity and the other of the heat spreader array and the substrate array is clamped to a first die of the mold such that the collapsible spacer array is disposed between the heat spreader array and the substrate array. A molding compound is molded in the mold, thereby molding the semiconductor dice, the substrate array, the collapsible spacer array and the heat spreader array into the molding compound to provide an array of molded packages. A plurality of ball grid arrays are formed on a second surface of the substrate array, bumps of the ball grid arrays being electrically connected to the conductive traces, and each integrated circuit package is singulated from the array of molded packages.
In yet another aspect, there is provided an integrated circuit package. The integrated circuit package includes a substrate having a plurality of conductive traces and a semiconductor die flip-chip mounted to a first surface of the substrate such that bumps of the semiconductor die are electrically connected to the ones of the plurality of conductive traces. A heat spreader is disposed proximal to and spaced from the semiconductor die by at least one collapsible spacer. A molding compound encapsulates the semiconductor die and the collapsible spacer between the substrate and the heat spreader. A ball grid array is disposed on a second surface of the substrate, bumps of the ball grid array being electrically connected to the conductive traces.
Advantageously, a heat spreader is incorporated into the BGA package during manufacture. The heat spreader is prepared and placed in the mold and is incorporated into the package by molding. An array of heat spreaders is placed in the mold and molded with a substrate array such that a plurality of packages including heat spreaders are manufactured in a single mold shot.
A thermal path is provided from the semiconductor die, through the collapsible spacer and to the heat spreader. Also, the heat spreader is effectively pressed against the lower mold die surface during molding, thereby inhibiting mold flash on the outer side of the heat spreader. The incorporation of a deformable material (collapsible spacer) that is stable at molding temperature, provides a compliant layer between the substrate and the heat spreader and the between the semiconductor die and the heat spreader. Thus, the heat spreader is pressed against the lower mold die, maintaining the heat spreader in contact with the lower mold die during molding and reducing mold flash.
In another aspect, the semiconductor die is bonded to the semiconductor die is attached to the substrate such that pads of the semiconductor die are electrically connected to the conductive traces of the substrate. Thus, wire bonds between the semiconductor die and the substrate are not required in the present embodiment. Advantageously, this arrangement obviates problems associated with electrical impedence in wire bonds.
The invention will be better understood with reference to the following description and to the drawings, in which:
Reference is not made to
Referring to
The process for manufacturing the ball grid array package 120, according to one embodiment of the present invention, will now be described in more detail. Referring to
The singulated semiconductor die 124 including solder bumps 140 on conductive pads of the semiconductor die 124, is flip-chip mounted to an upper surface of the substrate 122 by solder reflow technique. (
Next, the gap between the semiconductor die 124 and the top surface of the substrate 122 is underfilled with epoxy (
The heat spreader 132 is manufactured in the form of an array frame that is compatible with the substrate array 122 (
A plurality of collapsible spacers 136 are manufactured in the form of an array that is compatible with the substrate array 122 and the heat spreader 132 (
The heat spreader 132, in the array format, is placed in the bottom of a mold die cavity, on the lower surface of the mold. Features of the mold cavity and the frame are designed such that the heat spreader 132 aligns with the substrate 122 in the die cavity. The substrate array strip 122 is clamped to a surface of an upper mold die, in the mold cavity such that the semiconductor die 124 and the collapsible spacers 136 protrude from the substrate 22 into the mold cavity. The collapsible spacers 136, in the array format, are thus disposed between the heat spreader 132 and the substrate 122 (
Molding using a molding compound 128 in the mold die cavity follows. During molding, the collapsible spacers 136 are compressed between the substrate 122 and the heat spreader 132 and between the semiconductor die 124 and the heat spreader 132, causing deformation of the collapsible spacers 136 (
After removing the package 120 from the mold, the solder balls 130, also referred to as solder bumps, in the form of a ball grid array, are formed on the lower surface of the substrate 122 by conventional positioning (
Singulation of the individual BGA unit from the array strip is then performed either by saw signulation or die punching, resulting in the configuration shown in
Reference is now made to
Referring now to
Molding using a molding compound 128 in the mold die cavity follows. During molding, the collapsible spacers 136 are compressed between the substrate 122 and the heat spreader 132 and between the semiconductor die 124 and the heat spreader 132, causing deformation of the collapsible spacers 136 (
Reference is now made to
In
After fixing the heat spreader 132 to the substrate 122 and the semiconductor die 124, the solder balls 130, in the form of a ball grid array, are formed on the lower surface of the substrate 122 by conventional positioning (
Singulation of the individual BGA unit from the array strip is then performed either by saw singulation or die punching, resulting in the configuration shown in
Reference is now made to
Next, collapsible spacers 136 are mounted to the individual heat spreaders 132 as shown in
After fixing the heat spreaders 132 to the substrate 122 and the semiconductor dice 124, the solder balls 130, in the form of a ball grid array, are formed on the lower surface of the substrate 122 by conventional positioning (
Singulation of the individual BGA unit from the array strip is then performed either by saw singulation or die punching, resulting in the configuration shown in
Alternative embodiments and variations are possible. In one alternative embodiment, the collapsible spacers 136 are individually placed on the substrate 122 or on the heat spreader 132, rather than being manufactured in the form of an array. The collapsible spacers 136 are placed in the appropriate position with pre-dispensed flux using pick and place technology, followed by solder reflow. In still another alternative embodiment, epoxy is pre-applied to the substrate 122 or on the heat spreader 132, the collapsible spacers 136 are placed using pick and place technology and the epoxy is cured.
For example, rather than placing the heat spreader in the bottom of the mold cavity and clamping the substrate to the top mold die, the substrate can be placed in the bottom of the mold cavity and the heat spreader clamped to the top of the mold die. Rather than etching a copper strip to prepare the array frame of heat spreaders 132, the frame can be manufactured by metal stamping. Also, the heat spreader is not limited to copper as other suitable heat spreader materials are possible and will occur to those skilled in the art. In the above-described embodiments, the collapsible spacers are mounted to the substrate or the heat spreader using epoxy, however other means for mounting the collapsible spacers are possible. For example, the collapsible spacers can be mounted using solder reflow technique. Also, the collapsible spacers are not limited to solder preform as other suitable materials can be employed, including for example, low modulus conductive polymer such as silicone or a thermoplastic materials with low modulus such as polycarbonate. Still other embodiments and variations may occur to those of skill in the art. All such embodiments and variations are believed to be within the scope and sphere of the present invention.
This application is a Continuation of U.S. application Ser. No. 10/866,702, filed Jun. 15, 2004, which is a Division of U.S. application Ser. No. 10/647,696 (now U.S. Pat. No. 6,933,176), filed Aug. 25, 2003, which is a Continuation-In-Part of U.S. application Ser. No. 10/643,961 (now U.S. Pat. No. 6,987,032), filed Aug. 20, 2003, which is a Continuation-In-Part of U.S. application Ser. No. 10/323,657 (now U.S. Pat. No. 6,979,594), filed Dec. 20, 2002, which is a Continuation-In-Part of U.S. application Ser. No. 10/197,832 (now U.S. Pat. No. 6,800,948), filed Jul. 19, 2002. These applications, in their entirety, are incorporated herein by reference.
Number | Date | Country | |
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Parent | 10647696 | Aug 2003 | US |
Child | 10866702 | Jun 2004 | US |
Number | Date | Country | |
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Parent | 10866702 | Jun 2004 | US |
Child | 11377425 | Mar 2006 | US |
Number | Date | Country | |
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Parent | 10643961 | Aug 2003 | US |
Child | 10647696 | Aug 2003 | US |
Parent | 10323657 | Dec 2002 | US |
Child | 10643961 | Aug 2003 | US |
Parent | 10197832 | Jul 2002 | US |
Child | 10323657 | Dec 2002 | US |