Method of manufacturing semiconductor device

Information

  • Patent Application
  • 20070178623
  • Publication Number
    20070178623
  • Date Filed
    January 30, 2007
    17 years ago
  • Date Published
    August 02, 2007
    17 years ago
Abstract
A method of manufacturing a semiconductor device includes a bonding step of bonding a chip on a wiring board by means of a bonding layer, and a wire bonding step of bonding a wire to a pad on the chip while applying ultrasonic vibration after the bonding step. A material having an elastic modulus of 100 MPa or higher at a process temperature in the wire bonding step is used as the bonding layer.
Description

BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 is a plan view of a wiring board showing the entire appearance of the wiring board;



FIG. 2 is a plan view of the wiring board;



FIG. 3 is a sectional view of the wiring board;



FIG. 4 is an enlarged sectional view of an essential portion of the wiring board shown in FIG. 3;



FIG. 5 is a plan view showing the process of manufacturing a semiconductor device according to an embodiment of the present invention;



FIG. 6 is a sectional view showing the process of manufacturing the semiconductor device according to the embodiment of the present invention;



FIG. 7 is an enlarged sectional view of an essential portion of the semiconductor device shown in FIG. 6;



FIG. 8 is a plan view showing the process of manufacturing the semiconductor device according to the embodiment of the present invention;



FIG. 9 is a sectional view showing the process of manufacturing the semiconductor device according to the embodiment of the present invention;



FIG. 10 is a sectional view showing a wire bonding step;



FIG. 11 is a plan view showing the process of manufacturing the semiconductor device according to the embodiment of the present invention;



FIG. 12 is a sectional view showing the process of manufacturing the semiconductor device according to the embodiment of the present invention;



FIG. 13 is a plan view showing the process of manufacturing the semiconductor device according to the embodiment of the present invention;



FIG. 14 is a sectional view showing the process of manufacturing the semiconductor device according to the embodiment of the present invention;



FIG. 15 is a plan view showing the process of manufacturing the semiconductor device according to the embodiment of the present invention;



FIG. 16 is a sectional view showing the process of manufacturing the semiconductor device according to the embodiment of the present invention;



FIG. 17 is a sectional view showing the process of manufacturing the semiconductor device according to the embodiment of the present invention;



FIG. 18 is an enlarged sectional view of an essential portion of the semiconductor device shown in FIG. 17; and



FIG. 19 is a plan view showing a wiring board in which the proportion of portions where Cu wiring exists in the surface area for bonding of the chip is 90% or more.


Claims
  • 1. A method of manufacturing a semiconductor device comprising; a bonding step of bonding a chip on a wiring board by means of a bonding layer; anda wire bonding step of bonding a wire to a pad on the chip while applying ultrasonic vibration after the bonding step,wherein a material having an elastic modulus of 100 MPa or higher at a process temperature in the wire bonding step is used as the bonding layer.
  • 2. The method according to claim 1, wherein the chip used has a chip size of a 3 mm square or smaller.
  • 3. The method according to claim 1, wherein the shorter side of the chip used has a length of 3 mm or less.
  • 4. The method according to claim 1, wherein the chip used has an area of 9 mm2 or less.
  • 5. The method according to claim 1, wherein the process temperature in the wire bonding step is set to 100° C. or higher.
  • 6. The method according to claim 1, wherein the process temperature in the wire bonding step is set to 150° C. or higher.
  • 7. The method according to claim 1, further comprising a resin encapsulation step of performing resin encapsulation on the wiring board by transfer molding after the wire bonding step.
  • 8. The method according to claim 7, wherein in the resin encapsulation step the pressure at the time of resin encapsulation is 8 MPa or higher.
  • 9. The method according to claim 1, wherein a film is used as the bonding layer.
  • 10. The method according to claim 9, wherein the distance between ends of the chip and wiring on the wiring board is 0.5 mm or less.
  • 11. The method according to claim 9, wherein the chip used has a thickness of 100 μm or less.
  • 12. The method according to claim 9, further comprising a step of, after attaching the bonding layer to a back surface of a wafer on which a plurality of the chips are formed, cutting the wafer between each adjacent pair of the chips.
  • 13. The method according to claim 9, wherein a material containing 10 wt % or more of an inorganic filler is used as the bonding layer.
  • 14. The method according to claim 9, wherein a material containing 50 wt % or more of an inorganic filler is used as the bonding layer.
  • 15. The method according to claim 1, wherein a wiring board in which the proportion of portions where wiring exists in the surface area for bonding of the chip is 90% or more is used as the wiring board.
  • 16. The method according to claim 1, wherein a wiring board in which the height/depth of protrusions/recesses in the surface is 2 μm or less is used as the wiring board.
  • 17. The method according to claim 1, wherein a wiring board in which the height/depth of protrusions/recesses in the surface is 10 μm or less is used as the wiring board.
  • 18. The method according to claim 1, further comprising a resin encapsulation step of performing resin encapsulation on the wiring board by transfer molding after the wire bonding stepwherein a material having an elastic modulus of 1 GPa or less at the process temperature in the transfer molding is used as the bonding layer.
Priority Claims (1)
Number Date Country Kind
2006-021029 Jan 2006 JP national