Upon increasing the integration of current integrated circuits and upon optimizing production efficiency, also packaging and processing of integrated circuits have become a focus of industrial research and development. Conventional bonding techniques thereby provide an electric connection between an integrated circuit and a carrier, in which, for example, an electrical connection between contact pads of a semiconductor chip and corresponding equivalents of a carrier substrate are sequentially fabricated by using bonding a wire. However, such bonding not only is error-prone but further requires a lot of time and that a substantial volume of the packaging is reserved for the wires.
As a substantial progress in this field, the flip chip technology may be noted, in which a semiconductor substrate is directly connected to a carrier substrate. In this alternative conventional technology, contact pads are provided on the semiconductor chip, which are directly soldered to corresponding contact pads of a carrier substrate. Thereby, portions of a solder material are applied to the contact pads and the semiconductor chip is positioned headfirst on the carrier substrate such that contact pads of the semiconductor chip face the contact pads of the carrier substrate. Thereafter, the arrangement is heated, thus soldering the contact pads facing each other. Apart from a substantial simplification of the process, this method also allows for an optimized utilization of available space and thus also for a higher integration and smaller IC-packages.
Although the aforementioned bonding using bond wires may have disadvantages, but, nevertheless, bonding allows for a later inspection of the contact, and, in the case of a faulty contact, also for a respective reworking of the contact. As far as inspecting and/or reworking is concerned, this may be more difficult or even impossible using flip-chip technology. Although an electronic functionality check as well as an optical examination using X-rays is known, a correction or a reworking of faulty contacts may often be impossible. Moreover, quality control using X-rays may cause damage to the sensitive semiconductor structures, thus, again, resulting in a diminished process yield.
For these and other reasons there is a need for the present invention.
The accompanying drawings are included to provide a further understanding of the present invention and are incorporated in and constitute a part of this specification. The drawings illustrate the embodiments of the present invention and together with the description serve to explain the principles of the invention. Other embodiments of the present invention and many of the intended advantages of the present invention will be readily appreciated as they become better understood by reference to the following detailed description. The elements of the drawings are not necessarily to scale relative to each other. Like reference numerals designate corresponding similar parts.
In the following Detailed Description, reference is made to the accompanying drawings, which form a part hereof, and in which is illustrated by way of illustration specific embodiments in which the invention may be practiced. In this regard, directional terminology, such as “top,” “bottom,” “front,” “back,” “leading,” “trailing,” etc., is used with reference to the orientation of the Figure(s) being described. Because components of embodiments of the present invention can be positioned in a number of different orientations, the directional terminology is used for purposes of illustration and is in no way limiting. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present invention. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.
Various embodiments of the present invention may provide particular advantages for an improved integrated device, an improved memory device, an improved memory module, an improved circuit system, and an improved method for fabricating an electrical contacting.
One embodiment provides an integrated device that includes a carrier substrate, the carrier substrate including a through hole and a contact sleeve, the contact sleeve being arranged such that an opening of the contact sleeve and the through hole at least in part overlap; a circuit chip above the carrier substrate, the circuit chip including a contact pad on a surface facing the carrier substrate, the contact pad being arranged such that the contact pad and the opening of the contact sleeve at least in part overlap; and a conductive material, the conductive material electrically connecting the contact pad to the contact sleeve.
One embodiment provides a memory device having a carrier substrate, the carrier substrate including a through hole and a contact sleeve, the contact sleeve being arranged such that an opening of the contact sleeve and the through hole at least in part overlap; an integrated memory circuit above the carrier substrate, the integrated memory circuit including a contact pad on a surface facing the carrier substrate, the contact pad being arranged such that the contact pad and the opening of the contact sleeve at least in part overlap; and a conductive material, the conductive material electrically connecting the contact pad to the contact sleeve.
One embodiment provides a memory module including a circuit board, the circuit board including a through hole and a contact sleeve, the contact sleeve being arranged such that an opening of the contact sleeve and the through hole at least in part overlap; an integrated memory circuit above the circuit board, the integrated memory circuit including a contact pad on a surface facing the circuit board, the contact pad being arranged such that the contact pad and the opening of the contact sleeve at least in part overlap; and a conductive material, the conductive material electrically connecting the contact pad to the contact sleeve.
One embodiment provides a circuit system including a circuit board, the circuit board including a through hole and a contact sleeve, the contact sleeve being arranged such that an opening of the contact sleeve and the through hole at least in part overlap; an integrated circuit chip above the circuit board, the integrated circuit chip including a contact pad on a surface facing the circuit board, the contact pad being arranged such that the contact pad and the opening of the contact sleeve at least in part overlap; and a conductive material, the conductive material electrically connecting the contact pad to the contact sleeve.
One embodiment provides a method for fabricating an electrical contacting of an integrated circuit to a carrier substrate includes the processes of providing an integrated circuit including a contact pad on a surface of the integrated circuit; providing the carrier substrate with a through hole; providing a contact sleeve such that an opening of the contact sleeve and the through hole at least in part overlap; stacking the integrated circuit on the carrier substrate such that the contact pad and the opening of the contact sleeve at least in part overlap; and contacting the contact pad to the contact sleeve.
Embodiments may allow for the contacting of a contact pad of a chip to a contact sleeve of a carrier as well as for an inspection of the contact, and, if required, a reworking or correction of a faulty contact. By using the through hole of the carrier and the at least partial overlapping of the aperture of the through hole with the contact pad of the chip, the electrical contacting is accessible from one side even after the stacking of the chip on the carrier.
According to one embodiment, it is furthermore possible to increase the number of electrical contacts of a chip with a carrier, while maintaining the available area, thus achieving a high pitch.
According to one embodiment, a projecting contact is provided on the contact pad of the chip or circuit is carried out prior to stacking the chip or circuit on the carrier, such as a carrier substrate or a circuit board. During stacking, the projecting contact is at least partially inserted into the through hole of the carrier. A correct alignment of the chip or circuit relative to the carrier may be guaranteed by the mechanical locking of the projecting contact into the sleeve. Furthermore, an improved breaking strength may result in a better bonding of the projecting contacts of the chip to the carrier. Additional carrier layers, such as an under-fill layer, may be rendered obsolete. Furthermore, the material of the projecting contacts may have a thermal expansion which is in a range of the thermal expansion of the carrier material. This enables an advantageous joining of the chip or circuit and the carrier in a manner resistive to stress caused by temperature changes.
According to another embodiment, the contacting of the contact pad with the contact sleeve is carried out by welding. By using welding, a material of the involved components may be liquefied and coalesce. The solidified coalesced material then forms the conductive material and it may be not necessary to add any further material, such as solders, conductive pastes, or welding fillers. The welding may be carried out by using laser welding or ultrasonic welding.
According to another embodiment, the contacting of the contact pad is carried out by welding the projecting contact to the contact sleeve. Thereby, a projecting contact at least partially intrudes into the sleeve from a top side, while a contacting remains accessible from a bottom side.
According to another embodiment of the present invention, the contacting of the contact pad with the contact sleeve may be carried out by at least partially filling the through hole with a soldering metal. The chip is stacked onto the carrier from a top side while the sleeve is accessible from the bottom side and may be filled with solder from this side, e.g., by utilizing capillary and/or wetting forces. This may e.g., be carried out by using wave soldering, whereby liquid solder material penetrates the contact sleeve and forms the contacting.
According to another embodiment, an inspection of the contacting of the contact pad to the contact sleeve may be carried out after contacting, and, in the case of a faulty contacting, a renewed contacting may take place. The chip or circuit is stacked onto the carrier substrate or circuit board from a top side, and the contacting remains accessible from a bottom side via the contact sleeve and may therefore be directly inspected, examined, optically viewed and reworked. The contacting may be corrected e.g., by a renewed welding or soldering, optionally adding a further conductive material.
The carrier substrate 2 may e.g., be a chip carrier or also a printed circuit. The contact sleeve 20 usually includes a conductive material and for example includes one of the metals copper, gold, tin, lead, silver, antimony, aluminum or bismuth. The contact sleeve 20 may be provided by using electrically supported coating techniques, such as plating, or by using other methods for depositing metal layers frequently used in semiconductor technology.
The fabrication of the electrical contacting according to this embodiment of the present invention not only allows for an examination of the correct alignment of the contact pad 10 relative to the apertures of the through holes of the carrier substrate 2, e.g., by using an optical inspection through the through hole prior to providing the conductive material 30, but also an examination and, if required, a reworking and correction of the contacting of the contact pad 10 to the contact sleeve 20. In this way, e.g., the effective resistance between the contact pad 10 and the contact sleeve 20 may be measured or an inspection of the first conductive material 30 may be carried out. If required, the first conductive material 30 may be removed and then re-applied, or the first conductive material 30 may be re-liquefied—further conductive materials may optionally be added—in order to provide the contacting of the contact pad 10 with the contact sleeve 20.
According to this embodiment, the projecting contact 11 has a smaller perimeter than that of the contact sleeve 20, such that the contact 11 at least partially intrudes into the through hole of the carrier substrate 2, as illustrated in
As illustrated in
As is illustrated in
The contacting of the contact pad 10 with the contact sleeve 20 via the projecting contact 13 may be carried out by using either a solder or an adhesive, generally however, as illustrated in
According to this seventh embodiment, however, the intermediate space between the circuit chip 1 and the carrier substrate 2 is filled with an intermediate layer 4. The intermediate layer 4 may thereby include an insulating material and/or support a mechanical binding of the circuit chip 1 to the carrier substrate 2. Furthermore, the intermediate layer 4 may include a molding mass and be a part of the IC package which may then at least partially envelope the circuit chip 1 as well as the carrier substrate 2. Examples for molding masses are polymers, resins and ceramics.
The memory module 80 includes at least one memory device 81. The memory device 81 may be arranged on a top side of a printed circuit board 82 and/or on a bottom side of the printed circuit board 82. The memory module 80 may further include additional components, for example passive or active components and/or memory controller devices, such as a memory controller 89. The printed circuit board 82 may further include a notch 87, which may guarantee a correct insertion of the memory module 80 into a respective socket. Electrical connection of the memory module 80 is achieved by using a connector 88. The connector 88 may include one or more rows of contact pads which establish electrical contact through contact springs of a respective socket. The memory devices 81 may be DRAM devices, PC-RAM devices, flash-RAM devices, SRAM devices, CB-RAM devices, resistive memory devices, magnetic memory devices, and/or other types of memory devices.
According to one embodiment, a contact sleeve may in parts be arranged inside a through hole of a carrier, such as a carrier substrate or a circuit board. Furthermore the contact sleeve may also be arranged only on a surface of the carrier, hence not extending into the through hole. In this case, the contact sleeve may be formed as an eye, such as a soldering eye or a terminal tag. The sleeve and/or the eye may further be discontinuous or broken, such to form a C-shape and may be furthermore broken into more than one continuous parts. Furthermore, according to the present invention a chip, an integrated circuit, a circuit chip, an integrated memory circuit, or an integrated circuit chip is contacted to a carrier substrate, a chip carrier, a printed circuit board, an application board, or to a circuit board.
Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that a variety of alternate and/or equivalent implementations may be substituted for the specific embodiments illustrated and described without departing from the scope of the present invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, it is intended that this invention be limited only by the claims and the equivalents thereof.
Number | Date | Country | Kind |
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10 2006 042 774.2 | Sep 2006 | DE | national |
This Utility patent application is a divisional application of U.S. application Ser. No. 11/742,250, filed Apr. 30, 2007, which claims priority to German Application No. DE 10 2006 042 774.2, filed Sep. 12, 2006, which is herein incorporated by reference.
Number | Date | Country | |
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Parent | 11742250 | Apr 2007 | US |
Child | 13050645 | US |