The present application relates to the field of electronics, and more particularly, to methods of forming electronic component packages and related structures.
To form an electronic component package, an electronic component is mounted to a substrate. The substrate includes traces on the same surface of the substrate to which the electronic component is mounted. Bond wires are formed to electrically connect bond pads of the electronic component to the traces.
To protect the electronic component as well as the bond wires, the electronic component and bond wires are covered in an encapsulant. The traces extend from under the encapsulant to an exposed area of the surface of the substrate outside of the periphery of the encapsulant, i.e., not covered by the encapsulant. The traces include terminals on the exposed area of the substrate outside of and around the encapsulant.
Solder balls are formed on the terminals. These solder balls extend from the substrate to a height greater than the height of the encapsulant to allow the solder balls to be electrically connected to a larger substrate such as a printed circuit motherboard.
However, the solder balls are substantially spherical in shape. Thus, forming the solder balls with a height greater than the height of the encapsulant places fundamental restrictions on minimizing the pitch of the solder balls.
In accordance with one embodiment, a stackable via package includes a substrate having an upper surface and a trace on the upper surface, the trace including a terminal. A solder ball is on the terminal. The solder ball has a solder ball diameter A and a solder ball height D.
A via aperture is formed in a package body enclosing the solder ball to expose the solder ball. The via aperture includes a via bottom having a via bottom diameter B and a via bottom height C from the upper surface of the substrate, where A<B and 0=<C<1/2×D. The shape of the via aperture prevents solder deformation of the solder column formed from the solder ball as well as prevents solder bridging between adjacent solder columns.
These and other features of the present invention will be more readily apparent from the detailed description set forth below taken in conjunction with the accompanying drawings.
In the following description, the same or similar elements are labeled with the same or similar reference numbers.
As an overview and in accordance with one embodiment, referring to
A via aperture 230 is formed in a package body 124 enclosing solder ball 122 to expose solder ball 122. Via aperture 230 includes a via bottom 234, sometimes called a via aperture shelf, having a via bottom diameter B and a via bottom height C from upper surface 102U of substrate 102, where A<B and 0=<C<1/2×D. The shape of via aperture 230 prevents solder deformation of the solder column formed from solder ball 122 as well as prevents solder bridging between adjacent solder columns.
Now in more detail,
Stackable via package 100 further includes an electronic component 104. In one embodiment, electronic component 104 is an integrated circuit chip, e.g., an active component. However, in other embodiments, electronic component 104 is a passive component such as a capacitor, resistor, or inductor.
In accordance with this embodiment, electronic component 104 includes an active surface 106 and an opposite inactive surface 108. Electronic component 104 further includes bond pads 110 formed on active surface 106. Inactive surface 108 is mounted to upper surface 102U of substrate 102 with an adhesive 112, sometimes called a die attach adhesive.
Although electronic component 104 is illustrated and described as being mounted in a wirebond configuration, in other embodiments, electronic component 104 is mounted in a different configuration such as a flip chip configuration. In another embodiment, a plurality of electronic components are mounted, e.g., in a stacked configuration.
Formed on upper surface 102U of substrate 102 are electrically conductive upper, e.g., first, traces 114, e.g., formed of copper. Bond pads 110 are electrically connected to upper traces 114, e.g., bond fingers thereof, by electrically conductive bond wires 116.
Formed on lower surface 102L of substrate 102 are lower, e.g., second, traces 118. Lower traces 118 are electrically connected to upper traces 114 by electrically conductive vias 120 extending through substrate 102 between upper surface 102U and lower surface 102L. Although not illustrated in
Although a particular electrically conductive pathway between bond pads 110 and lower traces 118 is described above, other electrically conductive pathways can be formed. For example, contact metallizations can be formed between the various electrical conductors.
Further, instead of straight though vias 120, in one embodiment, substrate 102 is a multilayer substrate and a plurality of vias and/or internal traces form the electrical interconnection between upper traces 114 and lower traces 118.
In accordance with one embodiment, one or more of upper traces 114 is not electrically connected to lower traces 118, i.e., is electrically isolated from lower traces 118, and electrically connected to bond pads 110. To illustrate, a first upper trace 114A of the plurality of upper traces 114 is electrically isolated from lower traces 118 and electrically connected to a respective bond pad 110. In accordance with this embodiment, the respective bond pad 110 electrically connected to upper trace 114A is also electrically isolated from lower traces 118.
In accordance with one embodiment, one or more of upper traces 114 is electrically connected to both bond pads 110 and to lower traces 118. To illustrate, instead of being electrically isolated from lower traces 118, upper trace 114A is electrically connected to lower traces 118 by a via 120A of the plurality of vias 120. In accordance with this embodiment, the respective bond pad 110 is electrically connected to upper trace 114A and is also electrically connected to lower traces 118.
Via 120A is indicated by dashed lines to signify that formation of via 120A is optional. If via 120A is not formed, upper trace 114A is electrically isolated from lower traces 118. Conversely, if via 120A is formed, upper trace 114 is electrically connected to lower traces 118.
In accordance with one embodiment, one or more of upper traces 114 is not electrically connected to a bond pad 110, i.e., is electrically isolated from bond pads 110, and is electrically connected to lower traces 118. To illustrate, the upper trace 114 to the left of electronic component 104 in the view of
Although various examples of connections between bond pads 110, upper traces 114, and lower traces 118 are set forth above, in light of this disclosure, those of skill in the art will understand that any one of a number of electrical configurations are possible depending upon the particular application.
Formed on upper traces 114 are electrically conductive solder balls 122. Illustratively, solder balls 122 are formed of solder. In other embodiments, solder balls 122 are formed of other electrically conductive material such as plated copper or electrically conductive adhesive.
As set forth above, in accordance with various embodiments, upper traces 114 are electrically connected to lower traces 118, to bond pads 110, and/or to lower traces 118 and bond pads 110. Thus, in accordance with various embodiments, solder balls 122 are electrically connected to lower traces 118 only, to bond pads 110 only, and/or to both lower traces 118 and bond pads 110.
Electronic component 104, bond wires 116, solder balls 122 and the exposed portions of upper surface 102U including upper traces 114 are enclosed, sometimes called encased, encapsulated, and/or covered, with a package body 124. Illustratively, package body 124 is a cured liquid encapsulant, molding compound, or other dielectric material. Package body 124 protects electronic component 104, bond wires 116, solder balls 122, and the exposed portions of upper surface 102U including upper traces 114 from the ambient environment, e.g., from contact, moisture and/or shorting to other structures.
Package body 124 includes a principal surface 124P parallel to upper surface 102U of substrate 102. In accordance with this embodiment, package body 124 includes sides 124S extending perpendicularly between substrate 102 and principal surface 124P. Sides 124S are parallel to and lie in the same plane as sides 102S of substrate 102. Thus, package body 124 entirely covers upper traces 114.
Illustratively, stackable via package 100 is formed simultaneously with a plurality of packages in an array or strip. The array or strip is singulated resulting in sides 124S of package body 124 parallel to and lying in the same plane as sides 102S of substrate 102
Although the terms parallel, perpendicular, and similar terms are used herein, it is to be understood that the described features may not be exactly parallel and perpendicular, but only substantially parallel and perpendicular to within excepted manufacturing tolerances.
To form stackable via package 100 as illustrated in
Stackable via package 100 includes a via aperture 230 penetrating into package body 124 from principal surface 124P to expose solder ball 122. Although only a single via aperture 230, a single terminal 228 and a single solder ball 122 are illustrated in
In one embodiment, via aperture 230 is formed using a laser-ablation process. More particularly, a laser is repeatedly directed at principal surface 124P perpendicularly to principal surface 124P. This laser ablates, i.e., removes, portions of package body 124 leaving via apertures 230, sometimes called a through hole.
Although a laser-ablation process for formation of via aperture 230 is set forth above, in other embodiments, other via aperture formation techniques are used. For example, via aperture 230 is formed using selective molding, milling, mechanical drilling, chemical etching and/or other via aperture formation techniques.
As illustrated in
Via aperture 230 tapers from principal surface 124P to solder ball 122. More particularly, the diameter of via aperture 230 in a plane parallel to principal surface 124P is greatest at the top of via aperture 230, and smallest at the bottom of via aperture 230 and gradually diminishes between the top and bottom of via aperture 230. The top of via aperture 230 is located at principal surface 124P and the bottom of via aperture 230 is located between principal surface 124P of package body 124 and upper surface 102U of substrate 102 in this embodiment.
In another embodiment, via aperture 230 has a uniform diameter, i.e., has a cylindrical shape. In yet another embodiment, via aperture 230 tapers from the bottom to the top of via aperture 230. More particularly, the diameter of via aperture 230 in a plane parallel to principal surface 124P is smallest at the top of via aperture 230 and greatest at the bottom of via aperture 230 and gradually increases between the top and bottom of via aperture 230.
Via aperture 230 is defined by a via aperture sidewall 232 and a via aperture shelf 234 of package body 124. Via aperture shelf 234 is the via bottom of via aperture 230. Via aperture sidewall 232 extends between principal surface 124P of package body 124 and via aperture shelf 234. In accordance with this embodiment, via aperture sidewall 232 is in the shape of the lateral surface of an inverted truncated cone, sometimes called a frustum. Via aperture sidewall 232 is thus sometimes called a sloped sidewall.
Via aperture shelf 234 is parallel to upper surface 102U of substrate 102. Via aperture shelf 234 extends from via aperture sidewall 232 to solder ball 122.
As illustrated in
Solder ball 122 has a solder ball diameter A, which is the diameter of solder ball 122. Via aperture shelf 234 has a via aperture shelf diameter B, which is the diameter of via aperture shelf 234. Via aperture shelf diameter B is also the diameter of the bottom of via apertures 230 as so is sometimes also called the via bottom diameter B. In accordance with this embodiment, via aperture shelf diameter B is greater than solder ball diameter A. More particularly, solder ball diameter A and via aperture shelf diameter B are governed by the following relation (1):
A<B.
Via aperture shelf 234 has a via aperture shelf height C from upper surface 102U of substrate 102. More particularly, via aperture shelf height C is the distance between upper surface 102U of substrate 102 and via aperture shelf 234. Via aperture shelf height C is also the distance between upper surface 102U of substrate 102 and the bottom of via aperture 230 so is also sometimes called the via bottom height C. Solder ball 122 has a solder ball height D from upper surface 102U of substrate 102. More particularly, solder ball height D is the distance that solder ball 122 extends from upper surface 102U of substrate 102.
Via aperture shelf height C is greater than or equal to zero and less than one-half of solder ball height D (Solder ball height D is the middle of solder ball 122 in one embodiment). More particularly, via aperture shelf height C and solder ball height D are governed by the following relation (2):
0=<C<1/2×D.
According to relation (2), via aperture shelf 234 is located below the horizontal great circle of solder ball 122, i.e., below the maximum horizontal width of solder ball 122. Solder ball 122 is approximately spherical. The horizontal great circle is an imaginary circle on solder ball 122 that is parallel with upper surface 102U of substrate 102 and has the same center and radius as solder ball 122, and consequently divides solder ball 122 into two approximately equal parts. Accordingly, the cross-sectional area in a plane parallel to upper surface 102U of substrate 102 of lower portion 236 of solder ball 122 increases between terminal 228 and via aperture shelf 234.
Package body 124 includes a solder ball contact surface 240 in direct physical contact with lower portion 236 of solder ball 122. Solder ball contact surface 240 extends between upper surface 102U of substrate 102 and via aperture shelf 234. The circumference in a plane parallel to upper surface 102U of substrate 102 of solder ball contact surface 240 increases between upper surface 102U of substrate 102 and via aperture shelf 234.
Accordingly, the pocket defined by solder ball contact surface 240 which corresponds to lower portion 236 of solder ball 122 has a maximum diameter opening at via aperture shelf 234. In this manner, it has been surprisingly discovered that gases released during reflow of solder ball 122 are readily vented thus avoiding solder deformation of the solder column formed from solder ball 122 as discussed in greater detail below with reference to
As a further surprising result, solder bridging (shorts) between the solder column formed from solder ball 122 and adjacent solder columns is also avoided by via aperture 230. More particularly, by forming via aperture 230 with via aperture shelf 234, in the event that there is excess solder during the solder reflow of solder ball 122, via aperture 230 provides space for capture of the excess solder. This avoids the excess solder from overflowing on top of principal surface 124P of package body 124 and shorting to other electrically conductive structures such as adjacent solder columns. This is also discussed in greater detail below with reference to
Referring now to
In accordance with this embodiment, via aperture solder ball structure 300 is governed by: relation (1): A<B; and relation (2): 0=<C<1/2×D, where solder ball diameter A is the diameter of solder ball 122A, via aperture shelf diameter B is the diameter of via aperture shelf 234, via aperture shelf height C is the distance between upper surface 102U of substrate 102 and via aperture shelf 234, and solder ball height D is the distance that solder ball 122A extends from upper surface 102U of substrate 102.
Referring now to
As there is no via aperture shelf in accordance with this embodiment, via aperture shelf diameter B is sometimes called the via bottom diameter B. Further, as there is no via aperture shelf in accordance with this embodiment, a via aperture sidewall 232B of a via aperture 230B extends from principal surface 124P of package body 124 to upper surface 102U of substrate 102. The via bottom of via aperture 230 is at upper surface 102U of substrate 102. Further, an exposed portion 402 of upper surface 102U around terminal 228 and solder ball 122 is exposed through via aperture 230B.
In accordance with via aperture solder ball structure 400, solder ball 122 is mounted to terminal 228 prior to the formation of package body 124. More particularly, package body 124 is formed to enclose solder ball 122 in a manner similar to that discussed above in reference to
In accordance with another embodiment, solder ball 122 is mounted to terminal 228 after formation of package body 124 and via aperture 230B. In accordance with this embodiment, referring to
In accordance with this embodiment, via aperture solder ball structure 500 is governed by: relation (1): A<B; and relation (2): 0=<C<1/2×D, where solder ball diameter A is the diameter of solder ball 122, via aperture shelf diameter B is the diameter of via aperture shelf 234, via aperture shelf height C is the distance between upper surface 102U of substrate 102 and via aperture shelf 234, and solder ball height D is the distance that solder ball 122 extends from upper surface 102U of substrate 102.
As illustrated in
Referring now generally to
In accordance with another embodiment, referring now to
In accordance with yet another embodiment, referring again to
Referring now to
Recall that solder ball 122 has solder ball diameter A. Via aperture shelf 234 has via aperture shelf diameter B. In accordance with this embodiment, solder ball diameter A is greater than via aperture shelf diameter B, which is greater than exposed solder ball diameter E. More particularly, solder ball diameter A, via aperture shelf diameter B, and exposed solder ball diameter E are governed by the following relation (3):
A>B>E.
Referring now to
Referring now to
In
More particularly, interconnection ball 1754 and solder ball 122, e.g., solder, are heated to melt interconnection ball 1754 and solder ball 122. Upon melting, interconnection ball 1754 and solder ball 122 combine into a single molten structure, e.g., molten solder. This molten structure cools and forms solder column 1858. In accordance with this embodiment, solder column 1858 is integral, i.e., is a single unitary structure and not a plurality of different layers connected together.
Gases released during reflow of solder ball 122 are readily vented thus avoiding solder deformation of solder column 1858. Further, solder bridging (shorts) between adjacent solder columns 1858 is also avoided by the structure of via aperture 230. More particularly, by forming via aperture 230 with via aperture shelf 234, in the event that there is excess solder during the solder reflow, via aperture 230 provides space for capture of the excess solder. This avoids the excess solder from overflowing on top of principal surface 124P of package body 124 and shorting to adjacent solder columns 1858.
Solder column 1858 physically and electrically connects terminal 228 of stackable via package 100 with terminal 1752 of larger substrate 1750. Further, package body 124 defines the shape of solder column 1858 at terminal 228. More particularly, solder ball contact surface 240 of package body 124 defines the opening in package body 124 to terminal 228. Solder column 1858 fills this opening, which defines the shape of solder column 1858 at terminal 228.
Further, terminal 1752 and solder mask 1756 of larger substrate 1750 define the shape of solder column 1858 at terminal 1752. More particularly, terminal 1752 is solder wettable, whereas solder mask 1756 is not. Accordingly, solder column 1858 wets (directly contacts and adheres to) terminal 1752 and does not wet (does not contact or adhere to) solder mask 1756. Accordingly, terminal 1752 and solder mask 1756 define the shape of solder column 1858 at terminal 1752.
By defining the shape of solder column 1858 at terminals 228, 1752, reliability in the formation of solder column 1858 is maximized.
More particularly, interconnection ball 1754 and solder ball 122, e.g., solder, are heated to melt interconnection ball 1754 and solder ball 122. Upon melting, interconnection ball 1754 and solder ball 122 combine into a single molten structure, e.g., molten solder. This molten structure cools and forms solder column 2058. In accordance with this embodiment, solder column 2058 is integral, i.e., is a single unitary structure and not a plurality of different layers connected together.
Gases released during reflow of solder ball 122 are readily vented through via aperture 2303 thus avoiding solder deformation of solder column 2058. Further, solder bridging (shorts) between solder column 2058 and adjacent solder columns 2058 is also avoided by the structure of via aperture 230B. More particularly, by exposing exposed portion 402 of upper surface 102U around terminal 228 and solder ball 122 through via aperture 230B, in the event that there is excess solder during the solder reflow, via aperture 230B provides space for capture of the excess solder. This avoids the excess solder from overflowing on top of principal surface 124P of package body 124 and shorting to adjacent solder columns 2058.
Solder column 2058 physically and electrically connects terminal 228 with terminal 1752 of larger substrate 1750. Further, terminal 228 and solder mask 226 of substrate 102 define the shape of solder column 2058 at terminal 228. More particularly, terminal 228 is solder wettable, whereas solder mask 226 is not. Accordingly, solder column 2058 wets (adheres to) terminal 228 and does not wet (does not adhere to) solder mask 226. Accordingly, terminal 228 and solder mask 226 define the shape of solder column 2058 at terminal 228.
As discussed above, terminal 1752 and solder mask 1756 of larger substrate 1750 define the shape of solder column 2058 at terminal 1752. By defining the shape of solder column 2058 at terminals 228, 1752, reliability in the formation of solder column 2058 is maximized.
In the embodiments illustrated in
However, a via aperture solder ball structure in accordance with one embodiment accommodates a substantial amount of misalignment between interconnection ball 1754 and solder ball 122 as discussed further below in reference to
Solder column 2258 electrically and physically connects terminal 228 to terminal 1752. Due to the misalignment of interconnection ball 1754 and solder ball 122 and thus the misalignment of terminal 228 and terminal 1752, solder column 2258 is angled, i.e., has an angle of less than 90 degrees, with respect to upper surface 102U of substrate 102. In one embodiment, solder column 2258 rests on and contacts via aperture sidewall 232. In another embodiment, surface tension of solder column 2258 while in the molten state moves larger substrate 1750 with respect to substrate 102 thus aligning terminal 1752 to terminal 228.
Solder column 2458 electrically and physically connects terminal 228 to terminal 1752. Due to the misalignment of interconnection ball 1754 and solder ball 122 and thus the misalignment of terminal 228 and terminal 1752, solder column 2458 is angled, i.e., has an angle of less than 90 degrees, with respect to upper surface 102U of substrate 102. In one embodiment, solder column 2458 rests on and contacts via aperture sidewall 232B. In another embodiment, surface tension of solder column 2458 while in the molten state moves larger substrate 1750 with respect to substrate 102 thus aligning terminal 1752 to terminal 228.
More particularly, solder ball 122 is heated to melt solder ball 122. Upon melting, pin 2554 passes through solder ball 122 to terminal 228. Pin 2554 provides a fixed standoff in accordance with this embodiment, e.g., ensures a fixed space between terminals 228, 2552 equal to the length of pin 2554.
The drawings and the forgoing description gave examples of the present invention. The scope of the present invention, however, is by no means limited by these specific examples. Numerous variations, whether explicitly given in the specification or not, such as differences in structure, dimension, and use of material, are possible. The scope of the invention is at least as broad as given by the following claims.
The present application is a continuation of U.S. patent application Ser. No. 16/774,233, filed Jan. 28, 2020, and titled “STACKABLE VIA PACKAGE AND METHOD,” expected to issue as U.S. Pat. No. 11,089,685; which is a continuation of co-pending U.S. patent application Ser. No. 16/272,135, filed Feb. 11, 2019, and titled “STACKABLE VIA PACKAGE AND METHOD,” now U.S. Pat. No. 10,548,221; which is a continuation of U.S. application Ser. No. 16/042,312, filed Jul. 23, 2018, and titled “STACKABLE VIA PACKAGE AND METHOD,” now U.S. Pat. No. 10,206,285; which is a continuation of U.S. application Ser. No. 15/670,908, filed Aug. 7, 2017, and titled “STACKABLE VIA PACKAGE AND METHOD,” now U.S. Pat. No. 10,034,372; which is a continuation of U.S. application Ser. No. 14/657,032, filed Mar. 13, 2015, and titled “STACKABLE VIA PACKAGE AND METHOD,” now U.S. Pat. No. 9,730,327; which is a continuation of U.S. application Ser. No. 14/246,286, filed Apr. 7, 2014, and titled “STACKABLE VIA PACKAGE AND METHOD, now U.S. Pat. No. 9,012,789; which is a continuation of U.S. application Ser. No. 13/528,206, filed Jun. 20, 2012, and titled “STACKABLE VIA PACKAGE AND METHOD,” now U.S. Pat. No. 8,704,368; which is a continuation of U.S. application Ser. No. 12/483,913, filed Jun. 12, 2009, and titled “STACKABLE VIA PACKAGE AND METHOD,” now U.S. Pat. No. 8,222,538. Each of the above-mentioned applications is hereby incorporated herein by reference in its entirety.
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