BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a cross-sectional view, taken from FIG. 4 along a line segment 1-1, of an integrated circuit package system in an embodiment of the present invention;
FIG. 2 a cross-sectional view of an integrated circuit package system in an alternative embodiment of the present invention;
FIG. 3 is a top plan view of the integrated circuit package system;
FIG. 4 is a bottom plan view of the integrated circuit package system;
FIG. 5 is a cross-sectional view of an integrated circuit package system in another alternative embodiment of the present invention;
FIG. 6 is a cross-sectional view of package stacking with the integrated circuit package system of FIG. 1 or 2 using wire interconnection in another alternative embodiment of the present invention;
FIG. 7 is a cross-sectional view of an integrated circuit package system in another alternative embodiment of the present invention;
FIG. 8 is a cross-sectional view of package stacking with the integrated circuit package system of FIG. 7 using solder paste or conductive material in another alternative embodiment of the present invention;
FIG. 9 is a top plan view of the integrated circuit package system;
FIG. 10 is a bottom plan view of the integrated circuit package system;
FIG. 11 is a cross-sectional view of the integrated circuit package system in a first coverlay attach phase;
FIG. 12 is the structure of FIG. 1 in a first die attach phase;
FIG. 13 is the structure of FIG. 12 in a first die connect phase;
FIG. 14 is the structure of FIG. 13 in a second die attach phase;
FIG. 15 is the structure of FIG. 14 in a second coverlay attach phase;
FIG. 16 is the structure of FIG. 15 in a first detape and turn over phase;
FIG. 17 is the structure of FIG. 16 in a second die connect phase;
FIG. 18 is the structure of FIG. 17 in a mold and plastic mold compound (PMC) phase;
FIG. 19 is the structure of FIG. 18 in a second detape phase;
FIG. 20 is the structure of FIG. 19 in an optional plating and singulation phase;
FIG. 21 is a cross-sectional view of package stacking with the integrated circuit package system of FIG. 5 in another alternative embodiment of the present invention;
FIG. 22 is a cross-sectional view of package stacking with the integrated circuit package system of FIG. 20 using wire interconnection in another alternative embodiment of the present invention; and
FIG. 23 is a flow chart of an integrated circuit package system for manufacturing the integrated circuit package system in an embodiment of the present invention.