Claims
- 1. A method for simultaneously forming protective structures on a plurality of semiconductor devices, comprising:
providing a substrate comprising a plurality of semiconductor devices fabricated thereon; and stereolithographically forming the protective structures on at least some semiconductor devices of said plurality of semiconductor devices with bond pads of said at least some semiconductor devices being electrically exposed through the protective structures.
- 2. The method of claim 1, wherein said stereolithographically forming comprises forming each protective structure of the protective structures to include at least one layer comprising at least semisolid material.
- 3. The method of claim 1, wherein said stereolithographically forming comprises forming each protective structure of the protective structures to include a plurality of at least partially superimposed, contiguous, mutually adhered layers.
- 4. The method of claim 1, further comprising:
securing conductive structures to said bond pads.
- 5. The method of claim 4, wherein said securing is effected prior to said stereolithographically forming.
- 6. The method of claim 5, wherein said stereolithographically forming comprises selectively consolidating material of the protective structures to at least a semisolid state.
- 7. The method of claim 6, wherein said selectively consolidating comprises directing focused consolidating energy onto selected regions of a layer comprising unconsolidated material from which the protective structures are to be formed.
- 8. The method of claim 5, wherein said stereolithographically forming comprises nonselectively consolidating unconsolidated material from which the protective structures are to be formed.
- 9. The method of claim 5, wherein said securing is effected after said stereolithographically forming.
- 10. The method of claim 9, wherein said stereolithographically forming comprises selectively consolidating material of the protective structures to at least a semisolid state.
- 11. The method of claim 10, wherein said selectively consolidating comprises directing focused consolidating energy onto selected regions of a layer comprising unconsolidated material from which the protective structures are to be formed.
- 12. The method of claim 10, further comprising:
recognizing at least a location of said bond pads prior to said selectively consolidating.
- 13. The method of claim 12, wherein said recognizing comprises:
comparing viewed bond pads with stored data corresponding to at least one physical parameter of said at least some semiconductor devices; and using said stored data to direct said selectively consolidating.
- 14. The method of claim 1, wherein said providing said substrate comprises providing a bulk semiconductor substrate.
- 15. The method of claim 14, wherein said providing said bulk semiconductor substrate comprises providing a full or partial wafer of semiconductor material.
- 16. The method of claim 1, further comprising:
forming at least one recessed area that extends between at least two adjacent semiconductor devices of said at least some semiconductor devices.
- 17. The method of claim 16, wherein said forming comprises forming a bevel along a street between said at least two adjacent semiconductor devices.
- 18. The method of claim 16, wherein said stereolithographically fabricating comprises forming the protective structures so as to substantially fill said at least one recessed area.
- 19. The method of claim 18, further comprising:
forming or placing a protective structure on a back side of said substrate.
- 20. The method of claim 19, wherein said forming comprises stereolithographically forming said protective structure.
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is a continuation of application Ser. No. 09/882,754, filed Jun. 15, 2001, pending, which is a continuation of application Ser. No. 09/590,412, filed Jun. 8, 2000, now U.S. Pat. No. 6,326,698, issued Dec. 4, 2001.
Continuations (2)
|
Number |
Date |
Country |
Parent |
09882754 |
Jun 2001 |
US |
Child |
10317443 |
Dec 2002 |
US |
Parent |
09590412 |
Jun 2000 |
US |
Child |
09882754 |
Jun 2001 |
US |