Claims
- 1. A process for depositing a highly uniform silicon-containing material on a surface, comprising:
- 2. The process as claimed in Claim 1, wherein the Si-containing film is epitaxial.
- 3. The process as claimed in Claim 1, wherein the Si-containing film is polycrystalline.
- 4. The process as claimed in Claim 1, wherein the temperature is in the range of from about 450°C to about 750°C.
- 5. The process as claimed in Claim 4, wherein the temperature is in the range of from about 550°C to about 650°C.
- 6. The process as claimed in Claim 1, wherein the Si-containing film is deposited onto the substrate at a rate of about 50 Åper minute or higher.
- 7. The process as claimed in Claim 1, wherein the Si-containing film is deposited onto the substrate at a rate of about 100 Åper minute or higher.
- 8. The process as claimed in Claim 1, wherein the amorphous Si-containing film has a thickness non-uniformity across the substrate of about 5% or less.
- 9. The process as claimed in Claim 1, wherein the amorphous Si-containing film has a thickness non-uniformity across the substrate of about 1% or less.
- 10. The process as claimed in Claim 1, wherein the gas further comprises of one or more compounds selected from the group consisting of silane, germane, digermane, trigermane, NF3, monosilylmethane, disilylmethane, trisilylmethane, tetrasilylmethane, and a dopant precursor.
- 11. The process as claimed in Claim 1, wherein the gas further comprises of digermane.
- 12. The process as claimed in Claim 1, wherein the chamber is a single-wafer, horizontal gas flow reactor.
- 13. The process as claimed in Claim 1, wherein the Si-containing film is selected from the group consisting of a microdot, a SiGe film, a SiGeC film, a SiN film, a silicon oxide film, a silicon oxynitride film, a boron-doped film, an arsenic-doped film, a phosphorous-doped film, an indium-doped film, an antimony-doped film, and a film having a dielectric constant of about 2.2 or lower.
- 14. The process as claimed in Claim 1, wherein the Si-containing film is silicon and the substrate is a material having a high dielectric constant.
- 15. The process as claimed in Claim 1, further comprising patterning the film to form a transistor gate electrode.
- 16. A process for depositing a Si-containing material on a surface, comprising:
- 17. The process as claimed in Claim 16, wherein the substrate is maintained at a temperature of about 550°C or higher.
- 18. The process as claimed in Claim 16, wherein the substrate is maintained at a temperature of about 620°C or higher.
- 19. The process as claimed in Claim 16, wherein the chamber is maintained at a total pressure between about 1 Torr and 60 Torr.
- 20. The process as claimed in Claim 16, wherein the substrate is maintained at a temperature in the range of 450°C to about 700°C.
- 21. The process as claimed in Claim 16, wherein the substrate is maintained at a temperature in the range of about 525°C to about 650°C.
- 22. The process as claimed in Claim 16, wherein the deposition is carried out at a rate of about 50 Åper minute or higher.
- 23. The process as claimed in Claim 16, wherein the deposition is carried out at a rate of about 100 Åper minute or higher.
- 24. The process as claimed in Claim 16, wherein the gas further comprises one or more compounds selected from the group consisting of germane, digermane, trigermane, NF3, monosilylmethane, disilylmethane, trisilylmethane, tetrasilylmethane, and a dopant precursor.
- 25. The process as claimed in Claim 16, wherein the gas further comprises digermane.
- 26. The process as claimed in Claim 16, wherein the chemical vapor deposition chamber is a single-wafer, horizontal gas flow reactor.
- 27. The process as claimed in Claim 16, wherein the Si-containing film has a thickness non-uniformity of about 5% or less.
- 28. The process as claimed in Claim 16, wherein the Si-containing film has a thickness non-uniformity of about 1% or less.
- 29. The process as claimed in Claim 16, wherein the Si-containing film is selected from the group consisting of a microdot, a SiGe film, a SiGeC film, a SiN film, a silicon-oxygen film, a silicon-oxygen-nitrogen film, a boron-doped film, an arsenic-doped film, an indium-doped film, an antimony-doped film, a phosphorous-doped film, and a film having a dielectric constant of about 2.2 or lower.
- 30. The process as claimed in Claim 16, wherein the Si-containing film is silicon and the substrate is a material having a high dielectric constant.
- 31. The process as claimed in Claim 16, wherein the Si-containing film is epitaxial.
- 32. The process as claimed in Claim 16, wherein the Si-containing film is polycrystalline.
- 33. The process as claimed in Claim 16, wherein the Si-containing film is amorphous.
- 34. The process as claimed in Claim 16, further comprising patterning to form a transistor gate electrode.
- 35. A compound Si-containing film in an integrated circuit, the compound Si-containing film having a thickness non-uniformity of about 5% or less and a compositional non-uniformity across the film of about:
- 36. The Si-containing film as claimed in Claim 35, contained in a transistor gate electrode.
- 37. The Si-containing film as claimed in Claim 35, having a thickness non-uniformity of about 1% or less.
- 38. The Si-containing film as claimed in Claim 35, comprising SiGe.
- 39. The Si-containing film as claimed in Claim 35, comprising polycrystalline material.
- 40. The Si-containing film as claimed in Claim 35, comprising amorphous material.
- 41. A process for depositing a SiGe material on a surface, comprising:
- 42. The process as claimed in Claim 41, wherein the higher-order silane is selected from the group consisting of disilane, trisilane, and tetrasilane.
- 43. The process as claimed in Claim 41, wherein the higher-order germane is selected from the group consisting of digermane, trigermane and tetragermane.
- 44. The process as claimed in Claim 41, wherein the higher-order silane is trisilane and the higher-order germane is digermane.
- 45. The process as claimed in Claim 41, wherein the depositing is carried out at a temperature in the range of 475°C to about 700°C.
- 46. The process as claimed in Claim 41, wherein the depositing is carried out at a rate of about 50 Åper minute or higher.
- 47. The process as claimed in Claim 41, wherein the depositing is carried out at a rate of about 100 Åper minute or higher.
- 48. The process as claimed in Claim 41, wherein the gas further comprises one or more compounds selected from the group consisting of monosilylmethane, disilylmethane, trisilylmethane, tetrasilylmethane, and a dopant precursor.
- 49. The process as claimed in Claim 41, wherein the chemical vapor deposition chamber is a single-wafer, horizontal gas flow reactor.
- 50. The process as claimed in Claim 41, wherein the SiGe film has a thickness non-uniformity of 5% or less.
- 51. The process as claimed in Claim 41, wherein the SiGe film has greater uniformity than a comparable film made using silane in place of the higher-order silane.
- 52. The process as claimed in Claim 41, wherein the SiGe film has greater uniformity than a comparable film made using germane in place of the higher-order germane.
- 53. The process as claimed in Claim 41, further comprising patterning to form a transistor gate electrode.
- 54. A SiGe film in an integrated circuit, the SiGe film having a thickness non-uniformity of about 5% or less and a compositional non-uniformity of about 15 % or less.
- 55. The SiGe film as claimed in Claim 54, wherein the SiGe film is contained in a transistor gate electrode.
- 56. The SiGe film as claimed in Claim 54, the SiGe film having a thickness non-uniformity of about 1% or less and a compositional non-uniformity of about 10 % or less.
- 57. A process for depositing a Si-containing material on a surface, comprising:
- 58. The process as claimed in Claim 57, wherein the temperature control variables T1 and T2 are temperature control set points.
- 59. The process as claimed in Claim 57, which further comprises:
- 60. The process as claimed in Claim 57, wherein at least one of the first Si-containing chemical precursor and the second Si-containing chemical precursor is selected from the group consisting of silane, disilane and trisilane.
- 61. The process as claimed in Claim 57, wherein at least one of the first gas and the second gas comprises a compound selected from the group consisting of germane, digermane, trigermane, NF3, monosilylmethane, disilylmethane, trisilylmethane, tetrasilylmethane, and a dopant precursor including silylphosphines and silylarsines.
- 62. The process as claimed in Claim 57, wherein the substrate has a temperature of about 350°C or higher.
- 63. The process as claimed in Claim 57, wherein the substrate has a temperature in the range of 475°C to about 700°C.
- 64. The process as claimed in Claim 57, wherein the chemical vapor deposition chamber is a single-wafer, horizontal gas flow reactor.
- 65. The process as claimed in Claim 57, wherein the multiple layer Si-containing film is selected from the group consisting of a microdot, a SiGe film, a SiGeC film, a SiN film, a silicon-oxygen film, a silicon-oxygen-nitrogen film, a boron-doped film, an arsenic-doped film, an indium-doped film, an antimony-doped film, a phosphorous-doped film, an amorphous film, a polycrystalline film, an epitaxial film, and a film having a dielectric constant of about 2.2 or lower.
- 66. An apparatus for depositing a Si-containing material on a surface, comprising:
- 67. The apparatus as claimed in Claim 66, further comprising a manifold operatively connected to the feed line to control the passage of the trisilane from the vessel to the chemical vapor deposition chamber.
- 68. The apparatus as claimed in Claim 66, wherein the temperature controller is a heating blanket, heating bath or heating lamp.
- 69. The apparatus as claimed in Claim 66, wherein the chemical vapor deposition chamber is a single-wafer, horizontal gas flow reactor.
- 70. The apparatus as claimed in Claim 66, wherein the vessel is a bubbler equipped with a carrier gas source, wherein the carrier gas is selected from the group consisting of hydrogen, helium, neon, argon, krypton and nitrogen.
- 71. The apparatus as claimed in Claim 70, wherein the carrier gas is hydrogen.
- 72. The apparatus as claimed in Claim 70, which further comprises a heat source operatively disposed about the feed line and maintained at a temperature between about 35°C and 70°C to thereby reduce condensation of trisilane within the feed line.
- 73. The apparatus as claimed in Claim 66, wherein the temperature controller is maintained at a temperature between about 15°C and 52°C.
- 74. The process as claimed in Claim 15, wherein the film is deposited over a gate dielectric material having a dielectric constant greater than about 5.
- 75. The process as claimed in Claim 74, wherein the gate dielectric comprises aluminum oxide, zirconium oxide or hafnium oxide.
- 76. The process as claimed in Claim 1, wherein the Si-containing film comprises a silicon oxide.
- 77. The process as claimed in Claim 1, wherein the Si-containing film comprises a silicon oxynitride.
- 78. The process as claimed in Claim 1, wherein the Si-containing film comprises a silicon nitride.
- 79. The process as claimed in Claim 1, wherein the gas further comprises a nitrogen source.
- 80. The process as claimed in Claim 79, wherein the nitrogen source is selected from the group consisting of NF3, trisilylamine, atomic nitrogen, and ammonia.
- 81. The process as claimed in Claim 80, wherein the nitrogen source is atomic nitrogen.
- 82. The process as claimed in Claim 80, wherein the trisilane is introduced in pulses.
- 83. The process as claimed in Claim 159, wherein the Si-containing film is a SiN film having a thickness in the range of about 10 Åto about 300 Å.
Cross Reference to Related Applications
[0001] This application claims priority to U.S. Provisional Application No. 60/268,337, filed February 12, 2001; U.S. Provisional Application No. 60/279,256, filed March 27, 2001; U.S. Provisional Application No. 60/311,609, filed August 9, 2001; U.S. Provisional Application No. 60/323,649, filed September 19, 2001; U.S. Provisional Application No. 60/332,696, filed November 13, 2001; U.S. Provisional Application No. 60/333,724, filed November 28, 2001; and U.S. Provisional Application No. 60/340,454, filed December 7, 2001; all of which are hereby incorporated by reference in their entireties. This application is related to, and incorporates by reference in their entireties, co-owned and co-pending U.S. Patent Application Serial Numbers: 10/074,149; 10/074,722; 10/074,633; 10/074,564; and 10/074,534, all of which were filed on February 11, 2002.
Provisional Applications (7)
|
Number |
Date |
Country |
|
60/268,337 |
Feb 2001 |
US |
|
60/279,256 |
Mar 2001 |
US |
|
60/311,609 |
Aug 2001 |
US |
|
60/323,649 |
Sep 2001 |
US |
|
60/332,696 |
Nov 2001 |
US |
|
60/333,724 |
Nov 2001 |
US |
|
60/340,454 |
Dec 2001 |
US |