Patent Application
20120273935
The present invention relates generally to packaged electronic components and methods for packaging electronic components.
Electronic component packaging generally is the final stage of semiconductor device fabrication. The electronic components may be incorporated into an individual protective package, mounted with other components in hybrid or multi-component modules or connected directly onto a printed circuit board (PCB).
In accordance with an embodiment of the present invention, a method of forming a semiconductor device is disclosed. The method comprises forming a bump on a die, the bump having a solder top, melting the solder top by pressing the solder top directly on a contact pad of a support substrate, and forming a contact between the die and the support substrate.
In accordance with another embodiment of the present invention, an interconnect is disclosed. The interconnect comprises a chip pad arranged on a chip and a contact pad arranged on a support structure. The interconnect further comprises a pillar bump, the pillar bump formed on the chip pad and a contact, the contact connecting the pillar bump to the contact pad, the contact comprising a first alloy and a second alloy, the first alloy being different than the second alloy.
In accordance with yet another embodiment of the present invention, a method of manufacturing a semiconductor device is disclosed. The method comprises forming bump on a wafer and singulating the wafer, forming a plurality of dies, each die having a bump. The method further comprises placing a tape on the bumps, flipping the wafer and attaching the bump of one of the dies to a support substrate.
For a more complete understanding of the present invention, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:
a shows a wafer on a first tape;
b shows a second tape attached to the bond contacts of the wafer;
c shows a flipped wafer with a removed first tape;
a shows placing a die to a support substrate;
b shows bonding;
a shows an embodiment of a contact;
b shows an embodiment of a contact; and
The making and using of the presently preferred embodiments are discussed in detail below. It should be appreciated, however, that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The present invention will be described with respect to embodiments in a specific context, namely a method of manufacturing semiconductor devices. The specific embodiments discussed are merely illustrative of specific ways to make and use the invention, and do not limit the scope of the invention.
Flip chip assembly was introduced around 50 years ago and is a well established technology. Flip chip assembly has not changed much since. Flip chip assembly is performed by flip chip bonders applying a two arm concept. Singulated dies are placed on a sawing frame with upward facing flip chip bumps. The first handling arm of the flip chip bonder picks and flips the die. Then, the second handling arm takes over and dips the flip chip bumps into a container containing flux. The second handling arm places the die onto a leadframe at ambient temperature and the die attaches to the leadframe due to the flux. Flux dissolves oxides on metal surfaces and acts as an oxygen barrier by coating the surfaces, preventing their oxidation. A contact between the die and the leadframe is not yet formed. The leadframe with the attached die is then transferred into a reflow oven. The reflow oven heats the collapsible flip chip bumps above a melting temperature and a connection between the leadframe and the chip is formed. The flux must be removed before the space between the leadframe and the chip is filled with a molding compound.
Diffusion bonding is a process to assemble dies with a conductive metal backside onto leadframes. A die-bonder picks the dies from the sawing frame with the active side facing upward and the metal backside facing downward. The whole backside of the die is placed on a heated leadframe thereby bonding with the leadframe.
Embodiments of the present invention provide a bump contact. The bump contact may be a copper (Cu) pillar bump. The bump contact may comprise binary or ternary alloy. The bump contact may comprise a layer stack of binary and/or ternary alloys. The solder material may be essentially consumed and transformed into these alloys.
Embodiments of the present invention provide a method for manufacturing an interconnect between a chip and a support substrate. A bump contact connected to the chip may be placed on the heated support substrate. A top portion of the bump contact melts and may form binary and/or ternary alloys. The melted top portion of the bump contact forms a reliable contact between the chip and the support substrate.
Embodiments of the present invention provide a method for manufacturing a semiconductor device. A wafer may be placed on a first foil with bump contacts facing up. A second foil may be placed on the bump contacts. The wafer may be flipped so that the bump contacts face downward and the first foil may be removed. A cut die of the wafer may be placed on a support substrate with the bump contacts facing downward. The die may be placed on the support substrate in a one die-bonder arm movement.
Embodiments of the present invention comprise several advantages over conventional processes. The speed to place the dice onto the support substrate may be increased from around 2500 units per hour (UPH) to more than about 6000 UPH. Moreover, a height of a formed contact between a support substrate and a die may be reduced relative to conventional devices. For example, the height of the interconnect may be about 55 μm to about 65 μm. Advantageously, the electrical path between the substrate and the die may be shorter than in conventional devices
The top layer 316 may comprise a reflowable solder. The reflowable solder may be a lead based or a lead free material. The reflowable solder may comprise metals such as tin (Sn), lead (Pb), antimony (Sb), bismuth (Bi), silver (Ag), copper (Cu) or combinations thereof. In one embodiment the reflowable solder consists essentially of tin (Sn) or silver/tin (SnAg).
The bump 310 may be formed by forming a photoresist over the wafer 300. Openings may be formed in the photoresist and the openings may be used to form the contact pillars 312, the optional intermediate layer 314 and the top layer 316 of the bump 310. After forming the bump 310, the remaining portion of the photoresist is removed. Free standing bumps 310 may remain over the wafer 300 as is shown in
After forming the bumps 310 on the wafer 300, the wafer 300 may be cut. Cutting the wafer 300 may be carried out by placing the wafer 300 on a first foil or a dicing tape 350 as shown in
After cutting the wafer 300 into dice 320, a second foil 360 may be placed on the whole wafer 300. The second foil 360 may be placed on the bumps 310 of the active side 302 of the wafer 300.
The dicing tape 350 may then be removed from the wafer 300 by peeling, for example. The second foil 360 may be attached to the bond contacts 310 with a stronger adhesive strength than the first foil 350 to the back side 304 of the dice 320 of the wafer 300. Accordingly, the chips 320 may stick to the second foil 360 while the first foil 350 is peeled off. In one embodiment the first foil 350 and the second foil 360 are different type of foils. For example, one foil may be a regular dicing tape and the other foil may be an UV tape.
In one embodiment the dicing tape 350 may be removed before the wafer 300 is flipped.
In a mechanical operation, a die-bonder 380 as shown in
a shows a die 320 with three bumps 310 shortly before the bumps 310 are placed on contact pads 410 of a support substrate 400. The support substrate 400 may be a leadframe, a glass-core based substrate, or a printed circuit board (PCB), for example. The contact pads 410 and/or the support substrate 400 may comprise a conductive material such as nickel (Ni) or copper (Cu). The contact pads 410 and/or the support substrate 400 may be plated with silver (Ag) or gold (Au) in some embodiments and may be plated with a metal layer stack such as palladium/gold (Pd/Au) in other embodiments.
The bumps 310 may be placed on a heated support substrate 400. The support substrate 400 and the contact pads 410 may be heated to a temperature of about 180 C to about 350 C. The die 320 and the bumps 310 may be pressed onto the contact pads 410 by applying a bonding pressure for a certain amount of time. The bonding pressure may be about 5 g/mm2 to about 500 g/mm2. The bonding time may be between about 10 ms and about 1 s depending on the die size.
Upon pressing the bond contacts 310 onto the heated contact pads 410, the top layer 316 of the bond contact 310 may melt and the conductive pillar 312 material and/or the conductive material of the support substrate 400 or the contact pad 410 may diffuse into the melting top layer 316. The melting and the diffusion of the materials may start immediately upon applying the bonding pressure. The top layer 316 may transform itself to a contact 430 as shown in
For example, a height of the interconnect 450 may be about 55 μm to about 65 μm including a height of the contact 430 of about 3 μm to about 10 μm.
a shows one embodiment of an interconnect 450. The interconnect 450 is formed with the bump 310 of
The silver plating layer 411 may be about 1 μm to about 4 μm thick, the silver/tin (Ag/Sn) alloy layer 431 may be about 4 μm to about 5 μm thick, and the copper/tin (Cu/Sn) alloy layer 432 may be about 4 μm to about 5 μm thick. The thickness of the alloy layers 431, 432 may be dependent on the temperature budget, e.g., the thickness of the alloy layers 431, 432 may increase if the heating time increases.
b shows another embodiment of a contact 430 of an interconnect 450. Again, the interconnect 450 is formed with the bump 310 of
In another embodiment, the contact 430 comprises two copper/tin (Cu/Sn) alloy layers. The first binary copper/tin (Cu/Sn) alloy layer is formed near the contact pad 410 of the support substrate 400. A second binary copper/tin (Cu/Sn) alloy layer is formed below and around the tip of the copper pillar 312 above the first binary copper/tin (Cu/Sn) alloy layer. The first binary copper/tin (Cu/Sn) alloy layer is formed by copper (Cu) from a copper (Cu) pad 410 and/or a copper (Cu) leadframe diffusing into the melting solder top 316 of the bump 310.
Although the present invention and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure of the present invention, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed, that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present invention. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.
