BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 illustrate a set of alignment marks at a component coupled to a set of reference marks on a substrate with auxiliary conduction pathways, in an exemplary implementation;
FIG. 2 depicts an exemplary implementation of an alignment chain linking two components on a substrate using anisotropic conducting membrane as an interconnect layer;
FIG. 3 is depicts an enclosed electronic assembly comprising an alignment chain, in an exemplary implementation of the invention;
FIG. 4A depicts a profile of an exemplary electronic assembly using a fixture to assemble components on a substrate enclosed in a housing;
FIG. 4B depicts a top view of an exemplary fixture comprising interconnection traces and coupled to a substrate underneath;
FIG. 5 depicts an exemplary electronic assembly of a memory module, where a fixture is attached to a substrate to hold the ACM interfaced components in place enclosed in a housing;
FIG. 6 depicts a top view of a memory module including a fixture, components, an alignment chain, and an external interface enclosed in a clamshell according to an exemplary implementation of the invention;
FIG. 7 depicts a flowchart of an exemplary method for assembling ACM laminated components on a substrate embossed with placement cavities in an exemplary assembly enclosed in a housing;
FIG. 8 depicts a flowchart of an exemplary method for assembling an electronic assembly using ACP and ACM combined techniques; and
FIG. 9 depicts an exemplary stacked assembly comprising multiple MFSs in a cascade.