In the packaging of integrated circuits, a plurality of dies may be bonded on an interposer wafer, which comprises a plurality of interposers therein. After the bonding of the dies, an underfill may be dispensed into the gaps between the dies and the interposer wafer. A curing process may then be performed to cure the underfill.
It was found that underfill may shrink after being cured. As a result, the cured underfill applies a force on the dies and the interposer wafer, and hence may cause the interposer wafer to have a warpage. The warpage of the interposer wafer further results in the process difficulty in the subsequent processes. For example, in a subsequent process (e.g. molding, grinding, thin film, or the like), the interposer wafer needs to be secured on a chuck table through vacuum. With the interposer wafer having the warpage, however, the interposer wafer may not be able to be secured on the chuck table.
For a more complete understanding of the embodiments, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:
The making and using of the embodiments of the disclosure are discussed in detail below. It should be appreciated, however, that the embodiments provide many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative, and do not limit the scope of the disclosure.
A method of packaging integrated circuits is provided in accordance with various embodiments. The intermediate stages of forming a three-dimensional integrated circuit (3DIC) package in accordance with exemplary embodiments are illustrated. The variations of the embodiments are discussed. Throughout the various views and illustrative embodiments, like reference numbers are used to designate like elements.
Interconnect structure 28 is formed over semiconductor substrate 22, and is used to electrically connect to the integrated circuit devices and/or TVs 24. Interconnect structure 28 may include a plurality of dielectrics layers 30. Metal lines 32 are formed in dielectric layers 30. Vias 34 are formed between, and interconnecting, the overlying and underlying metal lines 32. Metal lines 32 and vias 34 are sometimes referred to as Redistribution Layer (RDL) 32/34. In some embodiments, dielectric layers 30 comprise silicon oxide, silicon nitride, silicon carbide, silicon oxynitride, combinations thereof, and/or multi-layers thereof. Alternatively, dielectric layers 30 may comprise one or more low-k dielectric layer having low k values. The k values of the low-k dielectric materials in dielectric layers 30 may be lower than about 3.0, or lower than about 2.5, for example.
Connectors 38 are formed at the top surface of package component 20. In some embodiments, connectors 38 comprise metal pillars, wherein solder caps may be, or may not be, formed on the top surfaces of the metal pillars. In alternative embodiments, connectors 38 comprise solder regions. In yet other embodiments, connectors 38 may be composite bumps comprising copper posts, nickel layers, solder caps, Electroless Nickel Immersion Gold (ENIG), Electroless Nickel Electroless Palladium Immersion Gold (ENEPIG), and/or the like.
Referring to
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Underfill 52 is then cured in a curing process. After the curing process, underfill 52 is either partially cured or fully cured. After the partial curing or the full curing, underfill 52 becomes more solid than before the curing process. The partial-curing may not result in the full solidification of underfill 52. During the partial-curing of underfill 52, underfill 52 may contract (shrink), and the partial-curing at least does not result in underfill 52 to be fully contracted. The resulting underfill 52 may still appear as a gel after the partial-curing. In some embodiments, the curing process is performed using a thermal cure process. In which embodiments, the partial-curing is performed using lower temperatures and/or a shorter time duration than the respective temperatures and the time duration that are needed for fully curing underfill 52. In accordance with some exemplary embodiments, the partial-curing may be performed at temperatures between about 80° C. and about 120° C. The duration of the exemplary partial-curing step may be between about one hour and three hours. It is appreciated that the desirable partial-curing conditions may be related to the type of underfill 52. Furthermore, other curing methods such as Ultra-Violet (UV) curing may be used, depending on the type of underfill 52. When the curing process is a full curing process, underfill 52 is fully solidified.
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In some exemplary embodiments, depth D of trenches 54 may be between about 5 percent and about 100 percent of the height measured from the top surface of die 44 to top surface 20A of package component 20. Width W of trenches 54 may be between about 5 μm and about 500 μm. Thickness T1 of the portion of underfill 52 that is directly under trenches 54 may be between about 0 μm and about 700 μm. As shown in
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In accordance with embodiments, by performing a partial-curing or a full curing on the underfill, sawing the underfill, and then performing a thermal annealing on the underfill, the warpage of the wafer that is underlying the underfill is significantly reduced. Experiments were made to form a first and a second sample package, respectively, from a first and a second sample wafer. The processes for forming the first and the second sample packages were similar to each other, except that when forming the first sample package, no partial-curing and sawing were performed on the respective underfill. The resulting warpage of the first sample wafer was about 800 μm. As a comparison, the partial-curing and sawing steps were performed on the respective underfill during the formation of the second sample package. The warpage of the second sample wafer was reduced to about 350 μm. This indicates that the underfill partial-curing and sawing may cause a significant reduction in the warpage of the wafers.
In accordance with embodiments, a method includes bonding a first and a second package component on a top surface of a third package component, and dispensing a polymer. The polymer includes a first portion in a space between the first and the third package components, a second portion in a space between the second and the third package components, and a third portion in a gap between the first and the second package components. A partial-curing is then performed on the polymer. After the curing, the third portion of the polymer is sawed to form a trench between the first and the second package components.
In accordance with other embodiments, a method includes bonding a first die and a second die on a top surface of each of a plurality of dies of a wafer, and dispensing an underfill to the spaces between the first and the second dies and the wafer. The underfill includes a portion disposed in a gap between the first and the second dies. A curing step is performed to harden the underfill. After the curing step, the portion of the underfill in the gap is sawed to form a trench. After the step of sawing, a thermal step is performed to anneal the underfill.
In accordance with yet other embodiments, a device includes a first package component, and a second package component and a third package component bonded to a top surface of the first package component. A first polymer region includes a first portion contacting a first sidewall of the first package component, wherein the first portion is in the gap between the second package component and the third package component. A second polymer region is disposed in the gap, wherein the second polymer contacts a sidewall of the first portion of the first polymer to form a visible interface. The visible interface includes a portion substantially perpendicular to the top surface of the first package component.
Although the embodiments and their advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the embodiments as defined by the appended claims. Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, and composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed, that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the disclosure. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps. In addition, each claim constitutes a separate embodiment, and the combination of various claims and embodiments are within the scope of the disclosure.
This application is a continuation of U.S. patent application Ser. No. 15/483,689, entitled, “Sawing Underfill in Packaging Processes,” filed on Apr. 10, 2017, which is a divisional of U.S. patent application Ser. No. 13/356,173, entitled “Sawing Underfill in Packaging Processes,” filed on Jan. 23, 2012, now U.S. Pat. No. 9,620,430 issued Apr. 11, 2017, which applications are incorporated herein by reference.
Number | Date | Country | |
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Parent | 13356173 | Jan 2012 | US |
Child | 15483689 | US |
Number | Date | Country | |
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Parent | 15483689 | Apr 2017 | US |
Child | 17094161 | US |