SEMICONDUCTOR DEVICE, INTERPOSER CHIP AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

Abstract

The semiconductor device with which bonding wires cannot contact easily is offered.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a plan view showing the structure of the semiconductor device by Embodiment 1 of this invention;

FIG. 2 is an II-II line cross-sectional view of FIG. 1;

FIG. 3 is a plan view showing the structure of the microcomputer chip shown in FIG. 1;

FIG. 4 is a plan view showing the structure of the interposer chip shown in FIG. 1;

FIG. 5 is a principal part enlarged view of the interposer chip shown in FIG. 4;

FIG. 6 is an enlarged view showing the microcomputer chip and interposer chip which were shown in FIG. 1;

FIG. 7 is a principal part cross-sectional view of the microcomputer chip and interposer chip which were shown in FIG. 1;

FIG. 8 is a circuit block picture showing the structure of the semiconductor device shown in FIG. 1;

FIG. 9 is a drawing showing the state where the semiconductor device shown in FIG. 1 was mounted in the mother board;

FIGS. 10A to 10E are drawings explaining a manufacturing method of a semiconductor device in Embodiment 2 of this invention;

FIG. 11 is a cross-sectional view for explaining the manufacturing method of the semiconductor device by Embodiment 3 of this invention;

FIG. 12 is a cross-sectional view showing the example of change of Embodiment 3;

FIG. 13 is a cross-sectional view for explaining the manufacturing method of the semiconductor device by this embodiment of the invention 4;

FIG. 14 is a cross-sectional view showing the example of change of Embodiment 4;

FIG. 15 is a plan view showing the structure of the semiconductor device by Embodiment 5 of this invention;

FIGS. 16A to 16C are cross-sectional views showing the manufacturing process of the semiconductor device shown in FIG. 15;

FIGS. 17A to 17C are other cross-sectional views showing the manufacturing process of the semiconductor device shown in FIG. 15;

FIGS. 18A to 18D are cross-sectional views showing the formation method of a stud bump shown in FIGS. 16A to 16C;

FIGS. 19A and 19B are cross-sectional views showing the ball-bonding method shown in FIGS. 17A to 17C; and

FIGS. 20A to 20D are cross-sectional views showing the stitch bonding method shown in FIGS. 17A to 17C.

Claims

1. A semiconductor device with which a first chip and a second chip were stacked over a front surface of a wiring substrate, wherein an interposer chip is formed over a front surface of the first chip, adjoining the second chip;a plurality of first electrodes are arranged along one side of a front surface of the wiring substrate;a plurality of second electrodes are arranged along one side at a side of the first electrodes of a front surface of the interposer chip;a plurality of third electrodes are arranged along one side of the interposer chip side of a front surface of the second chip;a plurality of fourth electrodes are arranged along one side which intersects perpendicularly with one side of the interposer chip side of a front surface of the second chip;along with one side of the second chip side of a front surface of the interposer chip, a plurality of fifth electrodes corresponding to the third electrodes and a plurality of sixth electrodes corresponding to the fourth electrodes are arranged;a distance between at least one fifth electrode in the fifth electrodes and one side of the second chip side of the interposer chip is longer than a distance between the each sixth electrode, and one side of the second chip side of the interposer chip;each third electrode is connected to a corresponding fifth electrode via a bonding wire;each fourth electrode is connected to a corresponding sixth electrode via a bonding wire;each fifth electrode is connected to a corresponding second electrode via a wiring of the interposer chip;each sixth electrode is connected to a corresponding second electrode via a wiring of the interposer chip; andeach second electrode is connected to a corresponding first electrode via a bonding wire.

2. A semiconductor device according to claim 1, wherein the fifth electrodes and the sixth electrodes are arranged almost circularly.

3. A semiconductor device with which a first chip and a second chip were stacked over a front surface of a wiring substrate, wherein an interposer chip is formed over a front surface of the first chip, adjoining the second chip;a plurality of first electrodes are arranged along one side of a front surface of the wiring substrate;a plurality of second electrodes and a plurality of third electrodes are arranged along one side at a side of the first electrodes of a front surface of the interposer chip;along with one side of the second chip side of a front surface of the interposer chip, a plurality of fourth electrodes corresponding to the second electrodes and a fifth electrode common to the third electrodes are arranged;a plurality of sixth electrodes, and a seventh electrode for bonding options are arranged along one side of the interposer chip side of a front surface of the second chip;each sixth electrode is connected to a corresponding fourth electrode via a bonding wire;each fourth electrode is connected to a corresponding second electrode via a wiring of the interposer chip;the seventh electrode is connected to the fifth electrode via a bonding wire;the fifth electrode is connected to the third electrodes via a branching wiring of the interposer chip;each second electrode is connected to a corresponding first electrode via a bonding wire;a third electrode which was chosen among the third electrodes is connected to a corresponding first electrode via a bonding wire; andthe second chip operates in a mode according to a selected third electrode.

4. An interposer chip with which a plurality of wirings were formed in a front surface of a substrate, wherein between two wirings for signals which adjoin of the wirings, a shielding wire for preventing a cross talk between concerning two wirings for signals is formed.

5. An interposer chip according to claim 4, wherein a width of each wiring for signals is larger than a width of the shielding wire.

6. An interposer chip according to claim 4, wherein the shielding wire and the two wirings for signals are extended and existed in a certain direction, and an end of the shielding wire is projected in the certain direction rather than an end of the two wirings for signals.

7. A manufacturing method of a semiconductor device which stacks a first chip and a second chip over a front surface of a wiring substrate, and manufactures a semiconductor device, wherein the first chip is mounted in a front surface of the wiring substrate;an interposer chip with which a mark for alignment was formed in a front surface is mounted over the first chip;alignment is done to the mark for alignment, and the second chip is mounted over the first chip; andbetween the second chip and the interposer chips is connected by a bonding wire.

8. A manufacturing method of a semiconductor device which mounts a first chip over a front surface of a wiring substrate, mounts a second chip smaller than this first chip over a front surface of the first chip, and manufactures a semiconductor device, wherein an adhesive strength of a first adhesive which pastes up between the wiring substrate and the first chip is weaker than an adhesive strength of a second adhesive which pastes up between the first and second chips.

9. A manufacturing method of a semiconductor device which mounts a chip over a front surface of a wiring substrate, and manufactures a semiconductor device, wherein a plurality of solder resist layers are laminated over a front surface of the wiring substrate, and the chip is adhered over the front surface with an adhesive film of less than or equal to 10 μm in thickness.

10. A manufacturing method of a semiconductor device which mounts a chip over a front surface of a wiring substrate, and manufactures a semiconductor device, wherein roller rolling of a dry film resist is done over a front surface of the wiring substrate, and the chip is adhered over the front surface with an adhesive film of less than or equal to 10 μm in thickness.

11. A manufacturing method of a semiconductor device which manufactures a semiconductor device with which a plurality of chips were stacked over a front surface of a wiring substrate, wherein a plurality of first electrodes are arranged along one side of the wiring substrate;a plurality of second electrodes are arranged along one side of respective chips;the chips are stacked so that the second electrodes of respective chips may be exposed, shifting predetermined distance;each second electrode is connected to a corresponding first electrode via a bonding wire;a mold which has rectangular parallelepiped-like interior space, an inlet formed in one corner of this interior space, and an exhaust port formed in a corner which faces with this inlet is prepared; andone side of the wiring substrate is turned in the same direction as one side of a bottom of the interior space, the semiconductor device is arranged in the interior space, liquid resin for sealing is injected from the inlet, and the interior space is made to fill up with and cure the liquid resin for sealing.

12. A semiconductor device with which a first-Nth (however, N is three or more integers) chips were stacked over a front surface of a wiring substrate, wherein a plurality of first electrodes are arranged along one side of the wiring substrate;a plurality of second electrodes are arranged along a side opposite to the one side of the wiring substrate;a plurality of third electrodes are arranged along each one side at the side of the first electrodes of the first to N−1th chips;the first to N−1th chips can be shifted a predetermined distance, and are stacked so that the third electrodes of the first to N−1th chip may be exposed;a plurality of fourth electrodes are arranged along one side at a side of the second electrodes of the Nth chip;the Nth chip is arranged over N−1th chip so that the Nth chip and the N−1th chip may exist at least between the fourth electrodes and a front surface of the wiring substrate;each third electrode is connected to a corresponding first electrode via a bonding wire; andeach fourth electrode is connected to a corresponding second electrode via a bonding wire.

13. A semiconductor device according to claim 12, wherein a total thickness of chips which exist between the fourth electrodes, and a front surface of the wiring substrate is set up more than or equal to 200 μm.