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H01L21/00
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ELECTRICITY
H01
Electric elements
H01L
SEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
Current Industry
H01L21/00
Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Sub Industries
H01L21/02
Manufacture or treatment of semiconductor devices or of parts thereof
H01L21/02002
Preparing wafers
H01L21/02005
Preparing bulk and homogeneous wafers
H01L21/02008
Multistep processes
H01L21/0201
Specific process step
H01L21/02013
Grinding, lapping
H01L21/02016
Backside treatment
H01L21/02019
Chemical etching
H01L21/02021
Edge treatment, chamfering
H01L21/02024
Mirror polishing
H01L21/02027
Setting crystal orientation
H01L21/0203
Making porous regions on the surface
H01L21/02032
by reclaiming or re-processing
H01L21/02035
Shaping
H01L21/02041
Cleaning
H01L21/02043
Cleaning before device manufacture
H01L21/02046
Dry cleaning only
H01L21/02049
with gaseous HF
H01L21/02052
Wet cleaning only
H01L21/02054
combining dry and wet cleaning steps
H01L21/02057
Cleaning during device manufacture
H01L21/0206
during, before or after processing of insulating layers
H01L21/02063
the processing being the formation of vias or contact holes
H01L21/02065
the processing being a planarization of insulating layers
H01L21/02068
during, before or after processing of conductive layers
H01L21/02071
the processing being a delineation
H01L21/02074
the processing being a planarization of conductive layers
H01L21/02076
Cleaning after the substrates have been singulated
H01L21/02079
Cleaning for reclaiming
H01L21/02082
product to be cleaned
H01L21/02085
Cleaning of diamond
H01L21/02087
Cleaning of wafer edges
H01L21/0209
Cleaning of wafer backside
H01L21/02093
Cleaning of porous materials
H01L21/02096
only mechanical cleaning
H01L21/02098
only involving lasers
H01L21/02101
only involving supercritical fluids
H01L21/02104
Forming layers
H01L21/02107
Forming insulating materials on a substrate
H01L21/02109
characterised by the type of layer
H01L21/02112
characterised by the material of the layer
H01L21/02115
the material being carbon
H01L21/02118
carbon based polymeric organic or inorganic material
H01L21/0212
the material being fluoro carbon compounds, e.g.(CFx) n, (CHxFy) n or polytetrafluoroethylene
H01L21/02123
the material containing silicon
H01L21/02126
the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements
H01L21/02129
the material being boron or phosphorus doped silicon oxides
H01L21/02131
the material being halogen doped silicon oxides
H01L21/02134
the material comprising hydrogen silsesquioxane
H01L21/02137
the material comprising alkyl silsesquioxane
H01L21/0214
the material being a silicon oxynitride
H01L21/02142
the material containing silicon and at least one metal element
H01L21/02145
the material containing aluminium
H01L21/02148
the material containing hafnium
H01L21/0215
the material containing tantalum
H01L21/02153
the material containing titanium
H01L21/02156
the material containing at least one rare earth element
H01L21/02159
the material containing zirconium
H01L21/02161
the material containing more than one metal element
H01L21/02164
the material being a silicon oxide
H01L21/02167
the material being a silicon carbide not containing oxygen
H01L21/0217
the material being a silicon nitride not containing oxygen
H01L21/02172
the material containing at least one metal element
H01L21/02175
characterised by the metal
H01L21/02178
the material containing aluminium
H01L21/02181
the material containing hafnium
H01L21/02183
the material containing tantalum
H01L21/02186
the material containing titanium
H01L21/02189
the material containing zirconium
H01L21/02192
the material containing at least one rare earth metal element
H01L21/02194
the material containing more than one metal element
H01L21/02197
the material having a perovskite structure
H01L21/022
the layer being a laminate, i.e. composed of sublayers
H01L21/02203
the layer being porous
H01L21/02205
the layer being characterised by the precursor material for deposition
H01L21/02208
the precursor containing a compound comprising Si
H01L21/02211
the compound being a silane
H01L21/02214
the compound comprising silicon and oxygen
H01L21/02216
the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen
H01L21/02219
the compound comprising silicon and nitrogen
H01L21/02222
the compound being a silazane
H01L21/02225
characterised by the process for the formation of the insulating layer
H01L21/02227
formation by a process other than a deposition process
H01L21/0223
formation by oxidation
H01L21/02233
of the semiconductor substrate or a semiconductor layer
H01L21/02236
group IV semiconductor
H01L21/02238
silicon in uncombined form
H01L21/02241
III-V semiconductor
H01L21/02244
of a metallic layer
H01L21/02247
formation by nitridation
H01L21/02249
formation by combined oxidation and nitridation performed simultaneously
H01L21/02252
formation by plasma treatment
H01L21/02255
formation by thermal treatment
H01L21/02258
formation by anodic treatment
H01L21/0226
formation by a deposition process
H01L21/02263
deposition from the gas or vapour phase
H01L21/02266
deposition by physical ablation of a target
H01L21/02269
deposition by thermal evaporation
H01L21/02271
deposition by decomposition or reaction of gaseous or vapour phase compounds
H01L21/02274
in the presence of a plasma [PECVD]
H01L21/02277
the reactions being activated by other means than plasma or thermal
H01L21/0228
deposition by cyclic CVD
H01L21/02282
liquid deposition
H01L21/02285
Langmuir-Blodgett techniques
H01L21/02288
printing
H01L21/0229
liquid atomic layer deposition
H01L21/02293
formation of epitaxial layers by a deposition process
H01L21/02296
characterised by the treatment performed before or after the formation of the layer
H01L21/02299
pre-treatment
H01L21/02301
in-situ cleaning
H01L21/02304
formation of intermediate layers
H01L21/02307
treatment by exposure to a liquid
H01L21/0231
treatment by exposure to electromagnetic radiation
H01L21/02312
treatment by exposure to a gas or vapour
H01L21/02315
treatment by exposure to a plasma
H01L21/02318
post-treatment
H01L21/02321
introduction of substances into an already existing insulating layer
H01L21/02323
introduction of oxygen
H01L21/02326
into a nitride layer
H01L21/02329
introduction of nitrogen
H01L21/02332
into an oxide layer
H01L21/02334
in-situ cleaning after layer formation
H01L21/02337
treatment by exposure to a gas or vapour
H01L21/0234
treatment by exposure to a plasma
H01L21/02343
treatment by exposure to a liquid
H01L21/02345
treatment by exposure to radiation
H01L21/02348
treatment by exposure to UV light
H01L21/02351
treatment by exposure to corpuscular radiation
H01L21/02354
using a coherent radiation
H01L21/02356
treatment to change the morphology of the insulating layer
H01L21/02359
treatment to change the surface groups of the insulating layer
H01L21/02362
formation of intermediate layers
H01L21/02365
Forming inorganic semiconducting materials on a substrate
H01L21/02367
Substrates
H01L21/0237
Materials
H01L21/02373
Group 14 semiconducting materials
H01L21/02376
Carbon
H01L21/02378
Silicon carbide
H01L21/02381
Silicon, silicon germanium, germanium
H01L21/02384
including tin
H01L21/02387
Group 13/15 materials
H01L21/02389
Nitrides
H01L21/02392
Phosphides
H01L21/02395
Arsenides
H01L21/02398
Antimonides
H01L21/024
Group 12/16 materials
H01L21/02403
Oxides
H01L21/02406
Sulfides
H01L21/02409
Selenides
H01L21/02411
Tellurides
H01L21/02414
Oxide semiconducting materials not being Group 12/16 materials
H01L21/02417
Chalcogenide semiconducting materials not being oxides
H01L21/0242
Crystalline insulating materials
H01L21/02422
Non-crystalline insulating materials
H01L21/02425
Conductive materials
H01L21/02428
Structure
H01L21/0243
Surface structure
H01L21/02433
Crystal orientation
H01L21/02436
Intermediate layers between substrates and deposited layers
H01L21/02439
Materials
H01L21/02441
Group 14 semiconducting materials
H01L21/02444
Carbon
H01L21/02447
Silicon carbide
H01L21/0245
Silicon, silicon germanium, germanium
H01L21/02452
including tin
H01L21/02455
Group 13/15 materials
H01L21/02458
Nitrides
H01L21/02461
Phosphides
H01L21/02463
Arsenides
H01L21/02466
Antimonides
H01L21/02469
Group 12/16 materials
H01L21/02472
Oxides
H01L21/02474
Sulfides
H01L21/02477
Selenides
H01L21/0248
Tellurides
H01L21/02483
Oxide semiconducting materials not being Group 12/16 materials
H01L21/02485
Other chalcogenide semiconducting materials not being oxides
H01L21/02488
Insulating materials
H01L21/02491
Conductive materials
H01L21/02494
Structure
H01L21/02496
Layer structure
H01L21/02499
Monolayers
H01L21/02502
consisting of two layers
H01L21/02505
consisting of more than two layers
H01L21/02507
Alternating layers
H01L21/0251
Graded layers
H01L21/02513
Microstructure
H01L21/02516
Crystal orientation
H01L21/02518
Deposited layers
H01L21/02521
Materials
H01L21/02524
Group 14 semiconducting materials
H01L21/02527
Carbon
H01L21/02529
Silicon carbide
H01L21/02532
Silicon, silicon germanium, germanium
H01L21/02535
including tin
H01L21/02538
Group 13/15 materials
H01L21/0254
Nitrides
H01L21/02543
Phosphides
H01L21/02546
Arsenides
H01L21/02549
Antimonides
H01L21/02551
Group 12/16 materials
H01L21/02554
Oxides
H01L21/02557
Sulfides
H01L21/0256
Selenides
H01L21/02562
Tellurides
H01L21/02565
Oxide semiconducting materials not being Group 12/16 materials
H01L21/02568
Chalcogenide semiconducting materials not being oxides
H01L21/0257
Doping during depositing
H01L21/02573
Conductivity type
H01L21/02576
N-type
H01L21/02579
P-type
H01L21/02581
Transition metal or rare earth elements
H01L21/02584
Delta-doping
H01L21/02587
Structure
H01L21/0259
Microstructure
H01L21/02592
amorphous
H01L21/02595
polycrystalline
H01L21/02598
monocrystalline
H01L21/02601
Nanoparticles
H01L21/02603
Nanowires
H01L21/02606
Nanotubes
H01L21/02609
Crystal orientation
H01L21/02612
Formation types
H01L21/02614
Transformation of metal
H01L21/02617
Deposition types
H01L21/0262
Reduction or decomposition of gaseous compounds
H01L21/02623
Liquid deposition
H01L21/02625
using melted materials
H01L21/02628
using solutions
H01L21/02631
Physical deposition at reduced pressure
H01L21/02634
Homoepitaxy
H01L21/02636
Selective deposition
H01L21/02639
Preparation of substrate for selective deposition
H01L21/02642
Mask materials other than SiO2 or SiN
H01L21/02645
Seed materials
H01L21/02647
Lateral overgrowth
H01L21/0265
Pendeoepitaxy
H01L21/02653
Vapour-liquid-solid growth
H01L21/02656
Special treatments
H01L21/02658
Pretreatments
H01L21/02661
In-situ cleaning
H01L21/02664
Aftertreatments
H01L21/02667
Crystallisation or recrystallisation of non-monocrystalline semiconductor materials
H01L21/02669
using crystallisation inhibiting elements
H01L21/02672
using crystallisation enhancing elements
H01L21/02675
using laser beams
H01L21/02678
Beam shaping
H01L21/0268
Shape of mask
H01L21/02683
Continuous wave laser beam
H01L21/02686
Pulsed laser beam
H01L21/02689
using particle beams
H01L21/02691
Scanning of a beam
H01L21/02694
Controlling the interface between substrate and epitaxial layer
H01L21/02697
Forming conducting materials on a substrate
H01L21/027
Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
H01L21/0271
comprising organic layers
H01L21/0272
for lift-off processes
H01L21/0273
characterised by the treatment of photoresist layers
H01L21/0274
Photolithographic processes
H01L21/0275
using lasers
H01L21/0276
using an anti-reflective coating
H01L21/0277
Electrolithographic processes
H01L21/0278
Röntgenlithographic or X-ray lithographic processes
H01L21/0279
Ionlithographic processes
H01L21/033
comprising inorganic layers
H01L21/0331
for lift-off processes
H01L21/0332
characterised by their composition
H01L21/0334
characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
H01L21/0335
characterised by their behaviour during the process
H01L21/0337
characterised by the process involved to create the mask
H01L21/0338
Process specially adapted to improve the resolution of the mask
H01L21/04
the devices having at least one potential-jump barrier or surface barrier
H01L21/0405
the devices having semiconductor bodies comprising semiconducting carbon
H01L21/041
Making n- or p-doped regions
H01L21/0415
using ion implantation
H01L21/042
Changing their shape
H01L21/0425
Making electrodes
H01L21/043
Ohmic electrodes
H01L21/0435
Schottky electrodes
H01L21/044
Conductor-insulator-semiconductor electrodes
H01L21/0445
the devices having semiconductor bodies comprising crystalline silicon carbide
H01L21/045
passivating silicon carbide surfaces
H01L21/0455
Making n or p doped regions or layers
H01L21/046
using ion implantation
H01L21/0465
using masks
H01L21/047
characterised by the angle between the ion beam and the crystal planes or the main crystal surface
H01L21/0475
Changing the shape of the semiconductor body
H01L21/048
Making electrodes
H01L21/0485
Ohmic electrodes
H01L21/049
Conductor-insulator-semiconductor electrodes
H01L21/0495
Schottky electrodes
H01L21/06
the devices having semiconductor bodies comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials
H01L21/08
Preparation of the foundation plate
H01L21/10
Preliminary treatment of the selenium or tellurium, its application to the foundation plate, or the subsequent treatment of the combination
H01L21/101
Application of the selenium or tellurium to the foundation plate
H01L21/103
Conversion of the selenium or tellurium to the conductive state
H01L21/105
Treatment of the surface of the selenium or tellurium layer after having been made conductive
H01L21/108
Provision of discrete insulating layers
H01L21/12
Application of an electrode to the exposed surface of the selenium or tellurium after the selenium or tellurium has been applied to the foundation plate
H01L21/14
Treatment of the complete device
H01L21/145
Ageing
H01L21/16
the devices having semiconductor bodies comprising cuprous oxide or cuprous iodide
H01L21/161
Preparation of the foundation plate, preliminary treatment oxidation of the foundation plate, reduction treatment
H01L21/162
Preliminary treatment of the foundation plate
H01L21/164
Oxidation and subsequent heat treatment of the foundation plate
H01L21/165
Reduction of the copper oxide, treatment of the oxide layer
H01L21/167
Application of a non-genetic conductive layer
H01L21/168
Treatment of the complete device
H01L21/18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities
H01L21/182
Intermixing or interdiffusion or disordering of III-V heterostructures
H01L21/185
Joining of semiconductor bodies for junction formation
H01L21/187
by direct bonding
H01L21/20
Deposition of semiconductor materials on a substrate
H01L21/2003
Characterised by the substrate
H01L21/2007
Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
H01L21/2011
the substrate being of crystalline insulating material
H01L21/2015
the substrate being of crystalline semiconductor material
H01L21/2018
Selective epilaxial growth
H01L21/2022
Epitaxial regrowth of non-monocrystalline semiconductor materials
H01L21/2026
using a coherent energy beam
H01L21/203
using physical deposition
H01L21/2033
Epitaxial deposition of elements of the Fourth Group of the Periodic System
H01L21/2036
Epitaxial deposition of AIII BV compounds
H01L21/205
using reduction or decomposition of a gaseous compound yielding a solid condensate
H01L21/2053
Expitaxial deposition of elements of the Fourth Group of the Periodic System
H01L21/2056
Epitaxial deposition of AIIIBV compounds
H01L21/208
using liquid deposition
H01L21/2085
Epitaxial deposition of AIIIBV compounds
H01L21/22
Diffusion of impurity materials
H01L21/2205
from the substrate during epitaxy
H01L21/221
of killers
H01L21/2215
in AIIIBV compounds
H01L21/222
Lithium-drift
H01L21/2225
Diffusion sources
H01L21/223
using diffusion into or out of a solid from or into a gaseous phase
H01L21/2233
Diffusion into or out of AIIIBV compounds
H01L21/2236
from or into a plasma phase
H01L21/225
using diffusion into or out of a solid from or into a solid phase
H01L21/2251
Diffusion into or out of group IV semiconductors
H01L21/2252
using predeposition of impurities into the semiconductor surface
H01L21/2253
by ion implantation
H01L21/2254
from or through or into an applied layer
H01L21/2255
the applied layer comprising oxides only
H01L21/2256
through the applied layer
H01L21/2257
the applied layer being silicon or silicide or SIPOS
H01L21/2258
Diffusion into or out of AIIIBV compounds
H01L21/228
using diffusion into or out of a solid from or into a liquid phase
H01L21/24
Alloying of impurity materials
H01L21/242
Alloying of doping materials with AIIIBV compounds
H01L21/244
Alloying of electrode materials
H01L21/246
with AIIIBV compounds
H01L21/248
Apparatus specially adapted for the alloying
H01L21/26
Bombardment with radiation
H01L21/2605
using natural radiation
H01L21/261
to produce a nuclear reaction transmuting chemical elements
H01L21/263
with high-energy radiation
H01L21/2633
for etching
H01L21/2636
for heating
H01L21/265
producing ion implantation
H01L21/26506
in group IV semiconductors
H01L21/26513
of electrically active species
H01L21/2652
Through-implantation
H01L21/26526
Recoil-implantation
H01L21/26533
of electrically inactive species in silicon to make buried insulating layers
H01L21/2654
in AIIIBV compounds
H01L21/26546
of electrically active species
H01L21/26553
Through-implantation
H01L21/2656
characterised by the implantation of both electrically active and inactive species in the same semiconductor region to be doped
H01L21/26566
of a cluster
H01L21/2658
of a molecular ion
H01L21/26586
characterised by the angle between the ion beam and the crystal planes or the main crystal surface
H01L21/26593
at a temperature lower than room temperature
H01L21/266
using masks
H01L21/268
using electromagnetic radiation
H01L21/2683
using X-ray lasers
H01L21/2686
using incoherent radiation
H01L21/28
Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in H01L21/20 - H01L21/268
H01L21/28008
Making conductor-insulator-semiconductor electrodes
H01L21/28017
the insulator being formed after the semiconductor body, the semiconductor being silicon
H01L21/28026
characterised by the conductor
H01L21/28035
the final conductor layer next to the insulator being silicon
H01L21/28044
the conductor comprising at least another non-silicon conductive layer
H01L21/28052
the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
H01L21/28061
the conductor comprising a metal or metallic silicode formed by deposition, e.g. sputter deposition
H01L21/2807
the final conductor layer next to the insulator being Si or Ge or C and their alloys except Si
H01L21/28079
the final conductor layer next to the insulator being a single metal
H01L21/28088
the final conductor layer next to the insulator being a composite
H01L21/28097
the final conductor layer next to the insulator being a metallic silicide
H01L21/28105
the final conductor next to the insulator having a lateral composition or doping variation, or being formed laterally by more than one deposition step
H01L21/28114
characterised by the sectional shape
H01L21/28123
Lithography-related aspects
H01L21/28132
conducting part of electrode is difined by a sidewall spacer or a similar technique
H01L21/28141
insulating part of the electrode is defined by a sidewall spacer
H01L21/2815
part or whole of the electrode is a sidewall spacer or made by a similar technique
H01L21/28158
Making the insulator
H01L21/28167
on single crystalline silicon, e.g. using a liquid
H01L21/28176
with a treatment
H01L21/28185
with a treatment
H01L21/28194
by deposition
H01L21/28202
in a nitrogen-containing ambient
H01L21/28211
in a gaseous ambient using an oxygen or a water vapour
H01L21/2822
with substrate doping
H01L21/28229
by deposition of a layer
H01L21/28238
with sacrificial oxide
H01L21/28247
passivation or protection of the electrode
H01L21/28255
the insulator being formed after the semiconductor body, the semiconductor belonging to the fourth group and not being elemental silicon
H01L21/28264
the insulator being formed after the semiconductor body, the semiconductor being a III-V compound
H01L21/28273
Making conductor-insulator-conductor-insulator-semiconductor electrodes
H01L21/28282
comprising a charge trapping insulator
H01L21/28291
comprising a layer which is used for its ferroelectric properties
H01L21/283
Deposition of conductive or insulating materials for electrodes conducting electric current
H01L21/285
from a gas or vapour
H01L21/28506
of conductive layers
H01L21/28512
on semiconductor bodies comprising elements of the fourth group of the Periodic System
H01L21/28518
the conductive layers comprising silicides
H01L21/28525
the conductive layers comprising semiconducting material
H01L21/28531
Making of side-wall contacts
H01L21/28537
Deposition of Schottky electrodes
H01L21/2855
by physical means
H01L21/28556
by chemical means
H01L21/28562
Selective deposition
H01L21/28568
the conductive layers comprising transition metals
H01L21/28575
on semiconductor bodies comprising AIIIBV compounds
H01L21/28581
Deposition of Schottky electrodes
H01L21/28587
characterised by the sectional shape
H01L21/28593
asymmetrical sectional shape
H01L21/288
from a liquid
H01L21/2885
using an external electrical current
H01L21/30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
H01L21/3003
Hydrogenation or deuterisation
H01L21/3006
of AIIIBV compounds
H01L21/302
to change their surface-physical characteristics or shape
H01L21/304
Mechanical treatment
H01L21/3043
Making grooves
H01L21/3046
using blasting
H01L21/306
Chemical or electrical treatment
H01L21/30604
Chemical etching
H01L21/30608
Anisotropic liquid etching
H01L21/30612
Etching of AIIIBV compounds
H01L21/30617
Anisotropic liquid etching
H01L21/30621
Vapour phase etching
H01L21/30625
With simultaneous mechanical treatment
H01L21/3063
Electrolytic etching
H01L21/30635
of A three - B five compounds
H01L21/3065
Plasma etching Reactive-ion etching
H01L21/30655
comprising alternated and repeated etching and passivation steps
H01L21/308
using masks
H01L21/3081
characterised by their composition
H01L21/3083
characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
H01L21/3085
characterised by their behaviour during the process
H01L21/3086
characterised by the process involved to create the mask
H01L21/3088
Process specially adapted to improve the resolution of the mask
H01L21/31
to form insulating layers thereon
H01L21/3105
After-treatment
H01L21/31051
Planarisation of the insulating layers
H01L21/31053
involving a dielectric removal step
H01L21/31055
the removal being a chemical etching step
H01L21/31056
the removal being a selective chemical etching step
H01L21/31058
of organic layers
H01L21/311
Etching the insulating layers by chemical or physical means
H01L21/31105
Etching inorganic layers
H01L21/31111
by chemical means
H01L21/31116
by dry-etching
H01L21/31122
of layers not containing Si
H01L21/31127
Etching organic layers
H01L21/31133
by chemical means
H01L21/31138
by dry-etching
H01L21/31144
using masks
H01L21/3115
Doping the insulating layers
H01L21/31155
by ion implantation
H01L21/312
Organic layers
H01L21/3121
Layers comprising organo-silicon compounds
H01L21/3122
layers comprising polysiloxane compounds
H01L21/3124
layers comprising hydrogen silsesquioxane
H01L21/3125
layers comprising silazane compounds
H01L21/3127
Layers comprising fluoro (hydro)carbon compounds
H01L21/3128
by Langmuir-Blodgett techniques
H01L21/314
Inorganic layers
H01L21/3141
Deposition using atomic layer deposition techniques [ALD]
H01L21/3142
of nano-laminates
H01L21/3143
composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides
H01L21/3144
on silicon
H01L21/3145
formed by deposition from a gas or vapour
H01L21/3146
Carbon layers
H01L21/3147
Epitaxial deposition of insulating materials
H01L21/3148
Silicon Carbide layers
H01L21/316
composed of oxides or glassy oxides or oxide based glass
H01L21/31604
Deposition from a gas or vapour
H01L21/31608
Deposition of SiO2
H01L21/31612
on a silicon body
H01L21/31616
Deposition of Al2O3
H01L21/3162
on a silicon body
H01L21/31625
Deposition of boron or phosphorus doped silicon oxide
H01L21/31629
Deposition of halogen doped silicon oxide
H01L21/31633
Deposition of carbon doped silicon oxide
H01L21/31637
Deposition of Tantalum oxides
H01L21/31641
Deposition of Zirconium oxides
H01L21/31645
Deposition of Hafnium oxides
H01L21/3165
formed by oxidation
H01L21/31654
of semiconductor materials
H01L21/31658
by thermal oxidation
H01L21/31662
of silicon in uncombined form
H01L21/31666
of AIII BV compounds
H01L21/3167
of anodic oxidation
H01L21/31675
of silicon
H01L21/31679
of AIII BV compounds
H01L21/31683
of metallic layers
H01L21/31687
by anodic oxidation
H01L21/31691
with perovskite structure
H01L21/31695
Deposition of porous oxides or porous glassy oxides or oxide based porous glass
H01L21/318
composed of nitrides
H01L21/3185
of siliconnitrides
H01L21/32
using masks
H01L21/3205
Deposition of non-insulating-
H01L21/32051
Deposition of metallic or metal-silicide layers
H01L21/32053
of metal-silicide layers
H01L21/32055
Deposition of semiconductive layers
H01L21/32056
Deposition of conductive or semi-conductive organic layers
H01L21/32058
Deposition of supra-conductive layers
H01L21/321
After treatment
H01L21/32105
Oxidation of silicon-containing layers
H01L21/3211
Nitridation of silicon-containing layers
H01L21/32115
Planarisation
H01L21/3212
by chemical mechanical polishing [CMP]
H01L21/32125
by simultaneously passing an electrical current, i.e. electrochemical mechanical polishing
H01L21/3213
Physical or chemical etching of the layers
H01L21/32131
by physical means only
H01L21/32132
of silicon-containing layers
H01L21/32133
by chemical means only
H01L21/32134
by liquid etching only
H01L21/32135
by vapour etching only
H01L21/32136
using plasmas
H01L21/32137
of silicon-containing layers
H01L21/32138
pre- or post-treatments
H01L21/32139
using masks
H01L21/3215
Doping the layers
H01L21/32155
Doping polycristalline - or amorphous silicon layers
H01L21/322
to modify their internal properties
H01L21/3221
of silicon bodies
H01L21/3223
using cavities formed by hydrogen or noble gas ion implantation
H01L21/3225
Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
H01L21/3226
of silicon on insulator
H01L21/3228
of AIIIBV compounds
H01L21/324
Thermal treatment for modifying the properties of semiconductor bodies
H01L21/3242
for the formation of PN junctions without addition of impurities
H01L21/3245
of III-V compounds
H01L21/3247
for altering the shape
H01L21/326
Application of electric currents or fields
H01L21/34
the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445 , H01L21/06, H01L21/16 and H01L21/18 with or without impurities
H01L21/38
Diffusion of impurity materials
H01L21/383
using diffusion into or out of a solid from or into a gaseous phase
H01L21/385
using diffusion into or out of a solid from or into a solid phase
H01L21/388
using diffusion into or out of a solid from or into a liquid phase
H01L21/40
Alloying of impurity materials
H01L21/42
Bombardment with radiation
H01L21/423
with high-energy radiation
H01L21/425
producing ion implantation
H01L21/426
using masks
H01L21/428
using electromagnetic radiation
H01L21/44
Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
H01L21/441
Deposition of conductive or insulating materials for electrodes
H01L21/443
from a gas or vapour
H01L21/445
from a liquid
H01L21/447
involving the application of pressure
H01L21/449
involving the application of mechanical vibrations
H01L21/46
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
H01L21/461
to change their surface-physical characteristics or shape
H01L21/463
Mechanical treatment
H01L21/465
Chemical or electrical treatment
H01L21/467
using masks
H01L21/469
to form insulating layers thereon
H01L21/47
organic layers
H01L21/471
Inorganic layers
H01L21/473
composed of oxides or glassy oxides or oxide based glass
H01L21/475
using masks
H01L21/4757
After-treatment
H01L21/47573
Etching the layer
H01L21/47576
Doping the layer
H01L21/4763
Deposition of non-insulating
H01L21/47635
After-treatment of these layers
H01L21/477
Thermal treatment for modifying the properties of semiconductor bodies
H01L21/479
Application of electric currents or fields
H01L21/48
Manufacture or treatment of parts
H01L21/4803
Insulating or insulated parts
H01L21/4807
Ceramic parts
H01L21/481
Insulating layers on insulating parts, with or without metallisation
H01L21/4814
Conductive parts
H01L21/4817
for containers
H01L21/4821
Flat leads
H01L21/4825
Connection or disconnection of other leads to or from flat leads
H01L21/4828
Etching
H01L21/4832
Etching a temporary substrate after encapsulation process to form leads
H01L21/4835
Cleaning
H01L21/4839
Assembly of a flat lead with an insulating support
H01L21/4842
Mechanical treatment
H01L21/4846
Leads on or in insulating or insulated substrates
H01L21/485
Adaptation of interconnections
H01L21/4853
Connection or disconnection of other leads to or from a metallisation
H01L21/4857
Multilayer substrates
H01L21/486
Via connections through the substrate with or without pins
H01L21/4864
Cleaning
H01L21/4867
Applying pastes or inks
H01L21/4871
Bases, plates or heatsinks
H01L21/4875
Connection or disconnection of other leads to or from bases or plates
H01L21/4878
Mechanical treatment
H01L21/4882
Assembly of heatsink parts
H01L21/4885
Wire-like parts or pins
H01L21/4889
Connection or disconnection of other leads to or from wire-like parts
H01L21/4892
Cleaning
H01L21/4896
Mechanical treatment
H01L21/50
Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326
H01L21/52
Mounting semiconductor bodies in containers
H01L21/54
Providing fillings in containers
H01L21/56
Encapsulations
H01L21/561
Batch processing
H01L21/563
Encapsulation of active face of flip-chip device
H01L21/565
Moulds
H01L21/566
Release layers for moulds
H01L21/568
Temporary substrate used as encapsulation process aid
H01L21/62
the devices having no potential-jump barriers or surface barriers
H01L21/64
Manufacture or treatment of solid state devices other than semiconductor devices, or of parts thereof, not peculiar to a single device provided for in groups H01L31/00 - H01L51/00
H01L21/67
Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
H01L21/67005
Apparatus not specifically provided for elsewhere
H01L21/67011
Apparatus for manufacture or treatment
H01L21/67017
Apparatus for fluid treatment
H01L21/67023
for general liquid treatment
H01L21/67028
for cleaning followed by drying, rinsing, stripping, blasting or the like
H01L21/67034
for drying
H01L21/6704
for wet cleaning or washing
H01L21/67046
using mainly scrubbing means
H01L21/67051
using mainly spraying means
H01L21/67057
with the semiconductor substrates being dipped in baths or vessels
H01L21/67063
for etching
H01L21/67069
for drying etching
H01L21/67075
for wet etching
H01L21/6708
using mainly spraying means
H01L21/67086
with the semiconductor substrates being dipped in baths or vessels
H01L21/67092
Apparatus for mechanical treatment
H01L21/67098
Apparatus for thermal treatment
H01L21/67103
mainly by conduction
H01L21/67109
mainly by convection
H01L21/67115
mainly by radiation
H01L21/67121
Apparatus for making assemblies not otherwise provided for
H01L21/67126
Apparatus for sealing, encapsulating, glassing, decapsulating or the like
H01L21/67132
Apparatus for placing on an insulating substrate
H01L21/67138
Apparatus for wiring semiconductor or solid state device
H01L21/67144
Apparatus for mounting on conductive members
H01L21/6715
Apparatus for applying a liquid, a resin, an ink or the like
H01L21/67155
Apparatus for manufacturing or treating in a plurality of work-stations
H01L21/67161
characterized by the layout of the process chambers
H01L21/67167
surrounding a central transfer chamber
H01L21/67173
in-line arrangement
H01L21/67178
vertical arrangement
H01L21/67184
characterized by the presence of more than one transfer chamber
H01L21/6719
characterized by the construction of the processing chambers
H01L21/67196
characterized by the construction of the transfer chamber
H01L21/67201
characterized by the construction of the load-lock chamber
H01L21/67207
comprising a chamber adapted to a particular process
H01L21/67213
comprising at least one ion or electron beam chamber
H01L21/67219
comprising at least one polishing chamber
H01L21/67225
comprising at least one lithography chamber
H01L21/6723
comprising at least one plating chamber
H01L21/67236
the substrates being processed being not semiconductor wafers
H01L21/67242
Apparatus for monitoring, sorting or marking
H01L21/67248
Temperature monitoring
H01L21/67253
Process monitoring
H01L21/67259
Position monitoring
H01L21/67265
of substrates stored in a container, a magazine, a carrier, a boat or the like
H01L21/67271
Sorting devices
H01L21/67276
Production flow monitoring
H01L21/67282
Marking devices
H01L21/67288
Monitoring of warpage, curvature, damage, defects or the like
H01L21/67294
using identification means
H01L21/673
using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
H01L21/67303
Vertical boat type carrier whereby the substrates are horizontally supported
H01L21/67306
characterized by a material, a roughness, a coating or the like
H01L21/67309
characterized by the substrate support
H01L21/67313
Horizontal boat type carrier whereby the substrates are vertically supported
H01L21/67316
characterized by a material, a roughness, a coating or the like
H01L21/6732
Vertical carrier comprising wall type elements whereby the substrates are horizontally supported
H01L21/67323
characterized by a material, a roughness, a coating or the like
H01L21/67326
Horizontal carrier comprising wall type elements whereby the substrates are vertically supported
H01L21/6733
characterized by a material, a roughness, a coating or the like
H01L21/67333
Trays for chips
H01L21/67336
characterized by a material, a roughness, a coating or the like
H01L21/6734
specially adapted for supporting large square shaped substrates
H01L21/67343
characterized by a material, a roughness, a coating or the like
H01L21/67346
characterized by being specially adapted for supporting a single substrate or by comprising a stack of such individual supports
H01L21/6735
Closed carriers
H01L21/67353
specially adapted for a single substrate
H01L21/67356
specially adapted for containing chips, dies or ICs
H01L21/67359
specially adapted for containing masks, reticles or pellicles
H01L21/67363
specially adapted for containing substrates other than wafers
H01L21/67366
characterised by materials, roughness, coatings or the like
H01L21/67369
characterised by shock absorbing elements
H01L21/67373
characterised by locking systems
H01L21/67376
characterised by sealing arrangements
H01L21/67379
characterised by coupling elements, kinematic members, handles or elements to be externally gripped
H01L21/67383
characterised by substrate supports
H01L21/67386
characterised by the construction of the closed carrier
H01L21/67389
characterised by atmosphere control
H01L21/67393
characterised by the presence of atmosphere modifying elements inside or attached to the closed carrierl
H01L21/67396
characterised by the presence of antistatic elements
H01L21/677
for conveying
H01L21/67703
between different workstations
H01L21/67706
Mechanical details
H01L21/67709
using magnetic elements
H01L21/67712
the substrate being handled substantially vertically
H01L21/67715
Changing the direction of the conveying path
H01L21/67718
Changing orientation of the substrate
H01L21/67721
the substrates to be conveyed not being semiconductor wafers or large planar substrates
H01L21/67724
by means of a cart or a vehicule
H01L21/67727
using a general scheme of a conveying path within a factory
H01L21/6773
Conveying cassettes, containers or carriers
H01L21/67733
Overhead conveying
H01L21/67736
Loading to or unloading from a conveyor
H01L21/67739
into and out of processing chamber
H01L21/67742
Mechanical parts of transfer devices
H01L21/67745
characterized by movements or sequence of movements of transfer devices
H01L21/67748
horizontal transfer of a single workpiece
H01L21/67751
vertical transfer of a single workpiece
H01L21/67754
horizontal transfer of a batch of workpieces
H01L21/67757
vertical transfer of a batch of workpieces
H01L21/6776
Continuous loading and unloading into and out of a processing chamber
H01L21/67763
the wafers being stored in a carrier, involving loading and unloading
H01L21/67766
Mechanical parts of transfer devices
H01L21/67769
Storage means
H01L21/67772
involving removal of lid, door, cover
H01L21/67775
Docking arrangements
H01L21/67778
involving loading and unloading of waers
H01L21/67781
Batch transfer of wafers
H01L21/67784
using air tracks
H01L21/67787
with angular orientation of the workpieces
H01L21/6779
the workpieces being stored in a carrier, involving loading and unloading
H01L21/67793
with orientating and positioning by means of a vibratory bowl or track
H01L21/67796
with angular orientation of workpieces
H01L21/68
for positioning, orientation or alignment
H01L21/681
using optical controlling means
H01L21/682
Mask-wafer alignment
H01L21/683
for supporting or gripping
H01L21/6831
using electrostatic chucks
H01L21/6833
Details of electrostatic chucks
H01L21/6835
using temporarily an auxiliary support
H01L21/6836
Wafer tapes
H01L21/6838
with gripping and holding devices using a vacuum; Bernoulli devices
H01L21/687
using mechanical means
H01L21/68707
the wafers being placed on a robot blade, or gripped by a gripper for conveyance
H01L21/68714
the wafers being placed on a susceptor, stage or support
H01L21/68721
characterised by edge clamping
H01L21/68728
characterised by a plurality of separate clamping members
H01L21/68735
characterised by edge profile or support profile
H01L21/68742
characterised by a lifting arrangement
H01L21/6875
characterised by a plurality of individual support members
H01L21/68757
characterised by a coating or a hardness or a material
H01L21/68764
characterised by a movable susceptor, stage or support, others than those only rotating on their own vertical axis
H01L21/68771
characterised by supporting more than one semiconductor substrate
H01L21/68778
characterised by supporting substrates others than wafers
H01L21/68785
characterised by the mechanical construction of the susceptor, stage or support
H01L21/68792
characterised by the construction of the shaft
H01L21/70
Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof Manufacture of integrated circuit devices or of parts thereof
H01L21/702
of thick-or thin-film circuits or parts thereof
H01L21/705
of thick-film circuits or parts thereof
H01L21/707
of thin-film circuits or parts thereof
H01L21/71
Manufacture of specific parts of devices defined in group H01L21/70
H01L21/74
Making of localized buried regions
H01L21/743
Making of internal connections, substrate contacts
H01L21/746
for AIII-BV integrated circuits
H01L21/76
Making of isolation regions between components
H01L21/7602
between components manufactured in an active substrate comprising SiC compounds
H01L21/7605
between components manufactured in an active substrate comprising AIII BV compounds
H01L21/7607
between components manufactured in an active substrate comprising II-VI compounds
H01L21/761
PN junctions
H01L21/762
Dielectric regions
H01L21/76202
using a local oxidation of silicon
H01L21/76205
in a region being recessed from the surface
H01L21/76208
using auxiliary pillars in the recessed region
H01L21/7621
the recessed region having a shape other than rectangular
H01L21/76213
introducing electrical inactive or active impurities in the local oxidation region
H01L21/76216
introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers
H01L21/76218
introducing both types of electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers
H01L21/76221
with a plurality of successive local oxidation steps
H01L21/76224
using trench refilling with dielectric materials
H01L21/76227
the dielectric materials being obtained by full chemical transformation of non-dielectric materials, such as polycristalline silicon, metals
H01L21/76229
Concurrent filling of a plurality of trenches having a different trench shape or dimension
H01L21/76232
of trenches having a shape other than rectangular or V-shape
H01L21/76235
trench shape altered by a local oxidation of silicon process step
H01L21/76237
introducing impurities in trench side or bottom walls
H01L21/7624
using semiconductor on insulator [SOI] technology
H01L21/76243
using silicon implanted buried insulating layers, e.g. oxide layers
H01L21/76245
using full isolation by porous oxide silicon
H01L21/76248
using lateral overgrowth techniques
H01L21/76251
using bonding techniques
H01L21/76254
with separation/delamination along an ion implanted layer
H01L21/76256
using silicon etch back techniques
H01L21/76259
with separation/delamination along a porous layer
H01L21/76262
using selective deposition of single crystal silicon
H01L21/76264
SOI together with lateral isolation
H01L21/76267
Vertical isolation by silicon implanted buried insulating layers, e.g. oxide layers
H01L21/7627
Vertical isolation by full isolation by porous oxide silicon
H01L21/76272
Vertical isolation by lateral overgrowth techniques
H01L21/76275
Vertical isolation by bonding techniques
H01L21/76278
Vertical isolation by selective deposition of single crystal silicon
H01L21/76281
Lateral isolation by selective oxidation of silicon
H01L21/76283
Lateral isolation by refilling of trenches with dielectric material
H01L21/76286
Lateral isolation by refilling of trenches with polycristalline material
H01L21/76289
Lateral isolation by air gap
H01L21/76291
Lateral isolation by field effect
H01L21/76294
using selective deposition of single crystal silicon
H01L21/76297
Dielectric isolation using EPIC techniques
H01L21/763
Polycristalline semiconductor regions
H01L21/764
Air gaps
H01L21/765
by field effect
H01L21/768
Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
H01L21/76801
characterised by the formation and the after-treatment of the dielectrics
H01L21/76802
by forming openings in dielectrics
H01L21/76804
by forming tapered via holes
H01L21/76805
the opening being a via or contact hole penetrating the underlying conductor
H01L21/76807
for dual damascene structures
H01L21/76808
involving intermediate temporary filling with material
H01L21/7681
involving one or more buried masks
H01L21/76811
involving multiple stacked pre-patterned masks
H01L21/76813
involving a partial via etch
H01L21/76814
post-treatment or after-treatment
H01L21/76816
Aspects relating to the layout of the pattern or to the size of vias or trenches
H01L21/76817
using printing or stamping techniques
H01L21/76819
Smoothing of the dielectric
H01L21/7682
the dielectric comprising air gaps
H01L21/76822
Modification of the material of dielectric layers
H01L21/76823
transforming an insulating layer into a conductive layer
H01L21/76825
by exposing the layer to particle radiation
H01L21/76826
by contacting the layer with gases, liquids or plasmas
H01L21/76828
thermal treatment
H01L21/76829
characterised by the formation of thin functional dielectric layers
H01L21/76831
in via holes or trenches
H01L21/76832
Multiple layers
H01L21/76834
formation of thin insulating films on the sidewalls or on top of conductors
H01L21/76835
Combinations of two or more different dielectric layers having a low dielectric constant
H01L21/76837
Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics
H01L21/76838
characterised by the formation and the after-treatment of the conductors
H01L21/7684
Smoothing; Planarisation
H01L21/76841
Barrier, adhesion or liner layers
H01L21/76843
formed in openings in a dielectric
H01L21/76844
Bottomless liners
H01L21/76846
Layer combinations
H01L21/76847
the layer being positioned within the main fill metal
H01L21/76849
the layer being positioned on top of the main fill metal
H01L21/7685
the layer covering a conductive structure
H01L21/76852
the layer also covering the sidewalls of the conductive structure
H01L21/76853
characterized by particular after-treatment steps
H01L21/76855
After-treatment introducing at least one additional element into the layer
H01L21/76856
by treatment in plasmas or gaseous environments
H01L21/76858
by diffusing alloying elements
H01L21/76859
by ion implantation
H01L21/76861
Post-treatment or after-treatment not introducing additional chemical elements into the layer
H01L21/76862
Bombardment with particles
H01L21/76864
Thermal treatment
H01L21/76865
Selective removal of parts of the layer
H01L21/76867
characterized by methods of formation other than PVD, CVD or deposition from a liquids
H01L21/76868
Forming or treating discontinuous thin films
H01L21/7687
Thin films associated with contacts of capacitors
H01L21/76871
Layers specifically deposited to enhance or enable the nucleation of further layers
H01L21/76873
for electroplating
H01L21/76874
for electroless plating
H01L21/76876
for deposition from the gas phase
H01L21/76877
Filling of holes, grooves or trenches
H01L21/76879
by selective deposition of conductive material in the vias
H01L21/7688
by deposition over sacrificial masking layer
H01L21/76882
Reflowing or applying of pressure to better fill the contact hole
H01L21/76883
Post-treatment or after-treatment of the conductive material
H01L21/76885
By forming conductive members before deposition of protective insulating material
H01L21/76886
Modifying permanently or temporarily the pattern or the conductivity of conductive members
H01L21/76888
By rendering at least a portion of the conductor non conductive
H01L21/76889
by forming silicides of refractory metals
H01L21/76891
by using supraconducting materials
H01L21/76892
modifying the pattern
H01L21/76894
using a laser
H01L21/76895
Local interconnects; Local pads, as exemplified by patent document EP0896365
H01L21/76897
Formation of self-aligned vias or contact plugs
H01L21/76898
formed through a semiconductor substrate
H01L21/77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
H01L21/78
with subsequent division of the substrate into plural individual devices
H01L21/7806
involving the separation of the active layers from a substrate
H01L21/7813
leaving a reusable substrate
H01L21/782
to produce devices, each consisting of a single circuit element
H01L21/784
the substrate being a semiconductor body
H01L21/786
the substrate being other than a semiconductor body
H01L21/82
to produce devices
H01L21/8206
the substrate being a semiconductor, using diamond technology
H01L21/8213
the substrate being a semiconductor, using SiC technology
H01L21/822
the substrate being a semiconductor, using silicon technology
H01L21/8221
Three dimensional integrated circuits stacked in different levels
H01L21/8222
Bipolar technology
H01L21/8224
comprising a combination of vertical and lateral transistors
H01L21/8226
comprising merged transistor logic or integrated injection logic
H01L21/8228
Complementary devices
H01L21/82285
Complementary vertical transistors
H01L21/8229
Memory structures
H01L21/8232
Field-effect technology
H01L21/8234
MIS technology
H01L21/823406
Combination of charge coupled devices
H01L21/823412
with a particular manufacturing method of the channel structures
H01L21/823418
with a particular manufacturing method of the source or drain structures
H01L21/823425
manufacturing common source or drain regions between a plurality of conductor-insulator-semiconductor structures
H01L21/823431
with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body
H01L21/823437
with a particular manufacturing method of the gate conductors
H01L21/823443
silicided or salicided gate conductors
H01L21/82345
gate conductors with different gate conductor materials or different gate conductor implants
H01L21/823456
gate conductors with different shapes, lengths or dimensions
H01L21/823462
with a particular manufacturing method of the gate insulating layers
H01L21/823468
with a particular manufacturing method of the gate sidewall spacers
H01L21/823475
interconnection or wiring or contact manufacturing related aspects
H01L21/823481
isolation region manufacturing related aspects
H01L21/823487
with a particular manufacturing method of vertical transistor structures
H01L21/823493
with a particular manufacturing method of the wells or tubs
H01L21/8236
Combination of enhancement and depletion transistors
H01L21/8238
Complementary field-effect transistors
H01L21/823807
with a particular manufacturing method of the channel structures
H01L21/823814
with a particular manufacturing method of the source or drain structures
H01L21/823821
with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body
H01L21/823828
with a particular manufacturing method of the gate conductors
H01L21/823835
silicided or salicided gate conductors
H01L21/823842
gate conductors with different gate conductor materials or different gate conductor implants
H01L21/82385
gate conductors with different shapes, lengths or dimensions
H01L21/823857
with a particular manufacturing method of the gate insulating layers
H01L21/823864
with a particular manufacturing method of the gate sidewall spacers
H01L21/823871
interconnection or wiring or contact manufacturing related aspects
H01L21/823878
isolation region manufacturing related aspects
H01L21/823885
with a particular manufacturing method of vertical transistor structures
H01L21/823892
with a particular manufacturing method of the wells or tubs
H01L21/8239
Memory structures
H01L21/8248
Combination of bipolar and field-effect technology
H01L21/8249
Bipolar and MOS technology
H01L21/8252
the substrate being a semiconductor, using III-V technology
H01L21/8254
the substrate being a semiconductor, using II-VI technology
H01L21/8256
the substrate being a semiconductor, using technologies not covered by one of groups H01L21/8206, H01L21/8213 , H01L21/822, H01L21/8252 and H01L21/8254
H01L21/8258
the substrate being a semiconductor, using a combination of technologies covered by H01L21/8206, H01L21/8213 , H01L21/822, H01L21/8252, H01L21/8254 or H01L21/8256
H01L21/84
the substrate being other than a semiconductor body
H01L21/845
including field-effect transistors with a horizontal current flow in a vertical sidewall of a semiconductor body
H01L21/86
the insulating body being sapphire, e.g. silicon on sapphire structure
Industries
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Patents Grants
last 30 patents
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Patent Grant
Substrate treatment apparatus having exhaust structure
Patent number
12,146,216
Issue date
Nov 19, 2024
DEVICEENG CO., LTD
Taek Youb Lee
C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information
Patent Grant
Plating and deplating currents for material co-planarity in semicon...
Patent number
12,146,235
Issue date
Nov 19, 2024
Applied Materials, Inc.
Paul R. McHugh
C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
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Patent Grant
Method of obtaining a smooth surface with epitaxial lateral overgrowth
Patent number
12,146,237
Issue date
Nov 19, 2024
The Regents of the University of California
Takeshi Kamikawa
C30 - CRYSTAL GROWTH
Information
Patent Grant
Semiconductor device and method for fabricating the same
Patent number
12,148,749
Issue date
Nov 19, 2024
Samsung Electronics Co., Ltd.
Cheol Kim
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method of fabricating a semiconductor device having capacitor material
Patent number
12,148,811
Issue date
Nov 19, 2024
Taiwan Semiconductor Manufacturing Co., Ltd
Wang-Chun Huang
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Semiconductor devices
Patent number
12,148,837
Issue date
Nov 19, 2024
Taiwan Semiconductor Manufacturing Co., Ltd
Yi-Bo Liao
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Training a machine learning system to detect an excursion of a CMP...
Patent number
12,148,149
Issue date
Nov 19, 2024
Applied Materials, Inc.
Sidney P. Huey
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Substrate processing apparatus
Patent number
12,148,637
Issue date
Nov 19, 2024
Tokyo Electron Limited
Kiyoshi Mori
C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information
Patent Grant
Abnormality detection system
Patent number
12,148,638
Issue date
Nov 19, 2024
Denso Corporation
Satoshi Kojima
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Contact conductive feature formation and structure
Patent number
12,148,659
Issue date
Nov 19, 2024
Taiwan Semiconductor Manufacturing Company, Ltd
Ken-Yu Chang
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Low resistance and high reliability metallization module
Patent number
12,148,660
Issue date
Nov 19, 2024
Applied Materials, Inc.
Roey Shaviv
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Semiconductor element, semiconductor element group, and method of m...
Patent number
12,148,662
Issue date
Nov 19, 2024
Rohm Co., Ltd.
Satoshi Nakagawa
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Tiered-profile contact for semiconductor
Patent number
12,148,663
Issue date
Nov 19, 2024
International Business Machines Corporation
Kisik Choi
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Power semiconductor package unit of surface mount technology includ...
Patent number
12,148,675
Issue date
Nov 19, 2024
PANJIT INTERNATIONAL INC.
Chung-Hsiung Ho
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Embedded chip package and manufacturing method thereof
Patent number
12,148,676
Issue date
Nov 19, 2024
Zhuhai ACCESS Semiconductor Co., Ltd
Xianming Chen
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Package structure and method
Patent number
12,148,684
Issue date
Nov 19, 2024
Taiwan Semiconductor Manufacturing Co., Ltd
Shu-Shen Yeh
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Microelectronic devices having air gap structures integrated with i...
Patent number
12,148,690
Issue date
Nov 19, 2024
Tahoe Research, LTD.
Han Wui Then
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Semiconductor package and manufacturing method thereof
Patent number
12,148,692
Issue date
Nov 19, 2024
Taiwan Semiconductor Manufacturing Company, Ltd
Fang-Yu Liang
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Electrical interconnect bridge
Patent number
12,148,704
Issue date
Nov 19, 2024
Intel Corporation
Srinivas V. Pietambaram
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Semiconductor device and method of manufacturing semiconductor device
Patent number
12,148,712
Issue date
Nov 19, 2024
Mitsubishi Electric Corporation
Kazuya Ogawa
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Shift control method in manufacture of semiconductor device
Patent number
12,148,733
Issue date
Nov 19, 2024
Taiwan Semiconductor Manufacturing Company, Ltd
Chih-Wei Wu
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Substrate processing method, method of manufacturing semiconductor...
Patent number
12,148,611
Issue date
Nov 19, 2024
Kokusai Electric Corporation
Takaaki Noda
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Laser annealing method, laser annealing device, and crystallized si...
Patent number
12,148,616
Issue date
Nov 19, 2024
V. Technology Co., Ltd.
Jun Gotoh
B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Mask structure, semiconductor structure and methods for manufacturi...
Patent number
12,148,618
Issue date
Nov 19, 2024
CHANGXIN MEMORY TECHNOLOGIES, INC.
Penghui Xu
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method of processing substrate, method of manufacturing semiconduct...
Patent number
12,148,621
Issue date
Nov 19, 2024
Kokusai Electric Corporation
Koei Kuribayashi
C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information
Patent Grant
Methods to prevent surface charge induced cd-dependent etching of m...
Patent number
12,148,625
Issue date
Nov 19, 2024
Tokyo Electron Limited
Shan Hu
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Cleave systems having spring members for cleaving a semiconductor s...
Patent number
12,148,635
Issue date
Nov 19, 2024
GlobalWafers Co., Ltd.
Justin Scott Kayser
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
MEMS device built on substrate with ruthenium based contact surface...
Patent number
12,148,580
Issue date
Nov 19, 2024
Menlo Microsystems, Inc.
Andrew Minnick
B81 - MICRO-STRUCTURAL TECHNOLOGY
Information
Patent Grant
Multi-zone gas distribution systems and methods
Patent number
12,148,597
Issue date
Nov 19, 2024
Applied Materials, Inc.
Saravjeet Singh
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Silicon oxide deposition method
Patent number
12,148,609
Issue date
Nov 19, 2024
ASM IP Holding B.V.
Varun Sharma
H01 - BASIC ELECTRIC ELEMENTS
Patents Applications
last 30 patents
Information
Patent Application
SYSTEMS AND METHODS FOR WAFER BOND MONITORING
Publication number
20240385124
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Co., Ltd.
Chih-Yu WANG
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
RETICLE ENCLOSURE FOR LITHOGRAPHY SYSTEMS
Publication number
20240385511
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Company, Ltd.
Chi-Hung LIAO
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
CLEANING METHOD, METHOD FOR FORMING SEMICONDUCTOR STRUCTURE AND SYS...
Publication number
20240385512
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing company Ltd.
WU-HUNG KO
B08 - CLEANING
Information
Patent Application
POST CMP BRUSH AND METHOD OF MANUFACTURING
Publication number
20240381994
Publication date
Nov 21, 2024
RAJEEV BAJAJ
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
ETCHING SOLUTION, ETCHING METHOD, AND METHOD FOR MANUFACTURING SEMI...
Publication number
20240384169
Publication date
Nov 21, 2024
Tokyo Ohka Kogyo Co., Ltd.
Kazuya Tajima
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
FREQUENCY AND PHASE CONTROLLED TRANSDUCERS AND SENSING
Publication number
20240387204
Publication date
Nov 21, 2024
Anand Deo
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
CONSTANT-TEMPERATURE LIQUID SUPPLY APPARATUS
Publication number
20240387210
Publication date
Nov 21, 2024
Disco Corporation
Tadaomi MATSUMOTO
B24 - GRINDING POLISHING
Information
Patent Application
SUBSTRATE PROCESSING SYSTEM, LOAD DEVICE AND METHOD
Publication number
20240387213
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Company, Ltd.
Chuang LI
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
SYSTEM AND METHOD FOR AUTOMATED MATERIAL HANDLING MANAGEMENT
Publication number
20240387214
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Company, Ltd.
Chieh Hsu
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
FINFET DEVICE AND METHOD OF FORMING SAME
Publication number
20240387237
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Co., Ltd.
Bo-Cyuan Lu
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
SILICON OXIDE LAYER FOR OXIDATION RESISTANCE AND METHOD FORMING SAME
Publication number
20240387238
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Co., Ltd.
Wan-Yi Kao
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
STRUCTURE OF HIGH-RESISTIVITY SILICON-ON-INSULATOR EMBEDDED WITH CH...
Publication number
20240387241
Publication date
Nov 21, 2024
ZING SEMICONDUCTOR CORPORATION
Xing WEI
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES
Publication number
20240387247
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Company, Ltd.
Ru-Gun LIU
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Interconnect Structures and Methods of Forming the Same
Publication number
20240387253
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Co., Ltd.
Wei-Ren Wang
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
RUTHENIUM-BASED LINER FOR A COPPER INTERCONNECT
Publication number
20240387256
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Company, Ltd.
Yao-Min LIU
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
FILM STACK SIMPLIFICATION FOR HIGH ASPECT RATIO PATTERNING AND VERT...
Publication number
20240387258
Publication date
Nov 21, 2024
LAM RESEARCH CORPORATION
Hui-Jung Wu
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
CONTACT FEATURES OF SEMICONDUCTOR DEVICE AND METHOD OF FORMING SAME
Publication number
20240387265
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Co., Ltd.
Pin-Wen Chen
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF
Publication number
20240387275
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Company, Ltd.
Shih-Yao Lin
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
Publication number
20240387276
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Co., Ltd.
Chung-Chiang Wu
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
HIGH VOLTAGE DEVICE
Publication number
20240387284
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Co., Ltd.
Sung-Hsin Yang
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
MANUFACTURING METHOD OF GROUP III-V SEMICONDUCTOR PACKAGE
Publication number
20240387300
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Company, Ltd.
Yi-An Lai
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
CANTILEVER WITH ETCH CHAMBER FLOW DESIGN
Publication number
20240387147
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Company, Ltd.
Chien-Liang Chen
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
STRUCTURE OF HIGH-RESISTIVITY SILICON-ON-INSULATOR EMBEDDED WITH CH...
Publication number
20240387171
Publication date
Nov 21, 2024
ZING SEMICONDUCTOR CORPORATION
Xing WEI
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND PATTERN FORMATIO...
Publication number
20240387173
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Company, Ltd.
Chih-Cheng LIU
C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information
Patent Application
STACKED SUBSTRATE FOR LASER LIFT-OFF, SUBSTRATE PROCESSING METHOD,...
Publication number
20240387176
Publication date
Nov 21, 2024
TOKYO ELECTRON LIMITED
Noboru OOIKE
B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information
Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING
Publication number
20240387184
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Company, Ltd.
Yan-Yu CHEN
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
CHIP PACKAGE STRUCTURE WITH NICKEL LAYER
Publication number
20240387192
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Company, Ltd.
Kuo-Ching HSU
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
CHIP PACKAGE STRUCTURE WITH RING DAM
Publication number
20240387195
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Company, Ltd.
Yu-Sheng LIN
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE
Publication number
20240387197
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Company, Ltd.
Jiun-Ting Chen
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Backside Interconnect Structures for Semiconductor Devices and Meth...
Publication number
20240387529
Publication date
Nov 21, 2024
Taiwan Semiconductor Manufacturing Co., Ltd.
Cheng-Ting Chung
H01 - BASIC ELECTRIC ELEMENTS